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* i965: Emit depth stalls and flushes before changing depth state on Gen6+.Kenneth Graunke2011-09-263-1/+44
| | | | | | | | | | | | Fixes OpenArena on Gen7. Technically, adding only the first depth stall fixes it, but the documentation says to do all three, and the Windows driver seems to do it. Not observed to fix anything on Gen6 yet. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38863 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* intel: Introduce a new intel_context::gt field to go along with gen.Kenneth Graunke2011-09-263-3/+11
| | | | | | | | | | It seems that GT1/GT2 sorts of variations are here to stay, and more special cases will likely be required in the future. Checking by PCI ID via the IS_xxx_GTx macros is cumbersome; introducing a new 'gt' field analogous to intel->gen will make this easier. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* intel: Remove intel_context::has_xrgb_textures/has_luminance_srgb.Kenneth Graunke2011-09-262-28/+13
| | | | | | | | | | | | | Seeing as they were only used once (in the same function they were defined), having them as context members seemed rather pointless. Remove them entirely (rather than using local variables) since the chipset generation checks are actually just as straightforward. While we're at it, clean up the remainder of the if-tree that set them. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Fix incorrect maximum PS thread count shift on Ivybridge.Kenneth Graunke2011-09-261-1/+1
| | | | | | | | | | | | | | At one point, the documentation said that max thread count in 3DSTATE_PS was at bit offset 23, but it's actually 24 on Ivybridge. Not only did this halve our thread count, it caused us to write 1 into a bit 23, which is marked as MBZ (must be zero). Furthermore, it made us write an even number into this field, which is apparently not allowed. Apparently we were just lucky it worked. NOTE: This is a candidate for the 7.11 branch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* intel: fix potential segfault error at intel_(un)map_texture_imageYuanhan Liu2011-09-261-2/+3
| | | | | | | | | intel_image->mt might be NULL, say with border width set. It then would trigger a segfault at intel_map/unmap_texture_image function. This would fix the oglc misctest(basic.textureBorderIgnore) fail. Signed-off-by: Yuanhan Liu <[email protected]>
* intel: Remove pointless boolean return value from *_miptree_layout.Kenneth Graunke2011-09-234-24/+11
| | | | | | | | | | i915_miptree_layout, i945_miptree_layout, and brw_miptree_layout always just return GL_TRUE, so there's really no point to it. Change them to void functions and remove the (dead) error checking code. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Yuanhan Liu <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Increase MaxClipPlanes to 8 for gen6+.Paul Berry2011-09-231-0/+3
| | | | | | This is necessary for GLSL 1.30 compliance. Reviewed-by: Eric Anholt <[email protected]>
* i965: Allow clip distances to be read back in fragment shaders.Paul Berry2011-09-232-6/+2
| | | | | | | | | | | | | | | | | | | | | | Previously, we conditionally set up the SF pipline stage with a urb_entry_read_offset of 2 when clipping was in use, and 1 otherwise, causing the clip distance VUE slots to be skipped if present. This was an extremely minor savings (it saved the SF unit from reading 2 vec4s out of the URB, but it didn't affect any computation, since we only instruct the SF unit to perform interpolation on VUE slots that are actually used by the fragment shader). GLSL 1.30 requires an interpolated version of gl_ClipDistance to be available for reading in the fragment shader, so we need the SF's urb_entry_read_offset to be 1 when the fragment shader reads from gl_ClipDistance. This patch just unconditionally sets the urb_entry_read_offset to 1 in all cases; this is sufficient to make gl_ClipDistance available to the fragment shader when it is needed, and the performance loss should be negligible when it isn't. Reviewed-by: Eric Anholt <[email protected]>
* i965: Set up clip distance VUE slots appropriately for gl_ClipDistance.Paul Berry2011-09-234-27/+32
| | | | | | | | | | | | | | | When gl_ClipDistance is in use, the contents of the gl_ClipDistance array just need to be copied directly into the clip distance VUE slots, so we re-use the code that copies all other generic VUE slots (this has been extracted to its own method). When gl_ClipDistance is not in use, the vertex shader needs to calculate the clip distances based on user-specified clipping planes. This patch also removes the i965-specific enum values BRW_VERT_RESULT_CLIP[01], since we now have generic Mesa enums that serve the same purpose (VERT_RESULT_CLIP_DIST[01]). Reviewed-by: Eric Anholt <[email protected]>
* i965: Don't upload clip planes when gl_ClipDistance is in use.Paul Berry2011-09-234-7/+12
| | | | | | | | When the vertex shader writes to gl_ClipDistance, we do clipping based on clip distances rather than user clip planes, so don't waste push constant space storing user clip planes that won't be used. Reviewed-by: Eric Anholt <[email protected]>
* i965: Enable lower_clip_distance.Paul Berry2011-09-231-0/+1
| | | | | | | | i965 requires gl_ClipDistance to be formatted as an array of 2 vec4's (as opposed to an array of 8 floats), so enable the lowering pass that performs this conversion. Reviewed-by: Eric Anholt <[email protected]>
* mesa: Add missing includes to meta.hChad Versace2011-09-231-0/+2
| | | | | | Include mtypes.h. Signed-off-by: Chad Versace <[email protected]>
* intel: fix the wrong code to detect null texture.Yuanhan Liu2011-09-231-1/+1
| | | | | | | | | | | | There is already comments show how to detect a null texture. Fix the code to match the comments. This would fix the oglc divzero(basic.texQOrWEqualsZero) and divzero(basic.texTrivialPrim) test case fail. Signed-off-by: Yuanhan Liu <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: fix the constant interp bitmask for flat modeYuanhan Liu2011-09-232-12/+26
| | | | | | | | | | | | | | | Fix the constant interpolation enable bit mask for flat light mode. FRAG_BIT_COL0 attribute bit might be 0, in which case we need to shift one more bit right. This would fix the oglc specularColor test fail on both Sandybridge and Ivybridge. v2: move the constant interp bitmask setup code into for(; attr < FRAG_ATTRIB_MAX; attr++) loop suggested by Eric. Signed-off-by: Yuanhan Liu <[email protected]> Signed-off-by: Xiang, Haihao <[email protected]>
* intel: Unindent the blit call in PBO blit uploads.Eric Anholt2011-09-221-17/+12
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Drop gratuitous flush in PBO blit upload.Eric Anholt2011-09-221-3/+0
| | | | | | | | Since the blit gets sequenced after other batchbuffer rendering like normal, there's no need to push things out early. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* intel: Clean up check_pbo_format to ignore internalFormat.Eric Anholt2011-09-221-25/+13
| | | | | | | | | | All that matters here is the format of the texture, not the internalformat (which might mean various different pixel formats). In one case, the pbo upload for MESA_FORMAT_YCBCR would have swapped the channels for MESA_FORMAT_YCBCR_REV. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* intel: Move more of the PBO blit upload logic into that function.Eric Anholt2011-09-221-26/+33
| | | | | | | | | This also improves the debugging output in the failure paths so you get more than just "failed", and don't get spammed with "failed" when you didn't even have a PBO to try. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* intel: Remove stale comment about non-intel gl_buffer_objects.Eric Anholt2011-09-221-8/+1
| | | | | | | | This hasn't been true since dd26899ca39111e0866afed9df94bfb1618dd363 in 2009. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* intel: Remove the pbo zero-copy code.Eric Anholt2011-09-225-247/+0
| | | | | | | | | | | There were notes about the possibility of slowdowns due to zcopy from a PBO due to thrashing around of the region. Slowdowns are even more likely now that textures are generally tiled, which a zcopy wouldn't get. Additionally, there were no checks on the buffer size to ensure that the hardware-required rounding was present, which could result in GPU hangs on large zcopy PBOs. Reviewed-by: Ian Romanick <[email protected]>
* intel: Remove extra FreeTextureImageBuffer() from glTexImage*.Eric Anholt2011-09-221-1/+0
| | | | | | | The core code does this before calling in to us. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Add support for GL_EXT_packed_float.Eric Anholt2011-09-223-0/+5
| | | | | | | | | | | This doesn't cover support for this format as a renderbuffer yet. The spec allows implementations to not support it, though it is something we do want to support. Only one failure in piglit on gen6, which is texwrap with bordercolor (as usual). Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add support for GL_EXT_texture_shared_exponent.Eric Anholt2011-09-223-0/+5
| | | | | | | Only one failure in piglit on gen6, which is texwrap with bordercolor (as usual). Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: remove support for GL_APPLE_client_storage extensionBrian Paul2011-09-221-1/+0
| | | | | | | AFAIK, there are few users of this extension and I can see a couple reasons why this is probably broken in Mesa anyway. Reviewed-by: Ian Romanick <[email protected]>
* meta: Don't hang on to program refcounts after metaops are done.Eric Anholt2011-09-211-0/+5
| | | | | | | Fixes piglit ARB_shader_objects/clear-with-deleted. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=39577 Reviewed-by: Brian Paul <[email protected]>
* i965/vs: Return a dummy value when visiting ir_texture.Eric Anholt2011-09-211-0/+1
| | | | | | While the program won't successfully link in the end, this avoids possible assertion failure in the driver during linking if this->result isn't initialized with something already.
* i965/gen6+: When only BFC is written, use BFC as the color.Eric Anholt2011-09-211-0/+9
| | | | Fixes piglit vertex-program-two-side enabled back back2
* i965/gen6+: Respect the VERTEX_PROGRAM_TWO_SIDE flag for shaders.Eric Anholt2011-09-213-9/+8
| | | | | | | Fixes piglit: vertex-program-two-side enabled front back front2 back2 vertex-program-two-side enabled front back vertex-program-two-side enabled front2 back2
* meta: use _mesa_set_enable() in more placesBrian Paul2011-09-201-5/+5
| | | | | | Avoids an extra context lookup. Reviewed-by: Eric Anholt <[email protected]>
* meta: use _mesa_set_enable(), fix decompress_texture_image()Brian Paul2011-09-201-1/+4
| | | | | | | | | Use _mesa_set_enable() to avoid a redudant context lookup. Need to disable the texture target in decompress_texture_image() so the unit isn't still enabled after glGetTexImage() returns. Arguably, the meta restore code should do this, but it doesn't. Reviewed-by: Eric Anholt <[email protected]>
* meta: fix broken sRGB mipmap generationBrian Paul2011-09-201-0/+28
| | | | | | | | | | If we're generating a mipmap for an sRGB texture we need to bypass sRGB->linear conversion. Otherwise the destination mipmap level (drawn with a textured quad) will have the wrong colors. If we can't turn of sRGB->linear conversion (GL_EXT_texture_sRGB_decode) we need to use the software fallback for mipmap generation. Note: This is a candidate for the 7.11 branch.
* mesa: move last bits of GLchan stuff into swrastBrian Paul2011-09-201-1/+1
| | | | | This removes the last remnants of the GLchan datatype and associated macros out of core Mesa and into swrast.
* radeon: use _mesa_unclamped_float_rgba_to_ubyte()Brian Paul2011-09-202-3/+3
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* r200: use _mesa_unclamped_float_rgba_to_ubyte()Brian Paul2011-09-202-3/+3
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* i965: Remove bogus assertion on MAX_CLIP_PLANES.Paul Berry2011-09-201-1/+0
| | | | | | | | | This patch removes the assertion "MAX_CLIP_PLANES == 6" from the i965 driver. This assertion is unnecessary; nothing in the driver requires MAX_CLIP_PLANES to be 6. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/vs: Add support for compute-to-MRF.Eric Anholt2011-09-203-0/+179
| | | | | Removes 1.8% of the instructions from 97% of the vertex shaders in shader-db.
* i965/vs: Do VUE writes using the MRF file instead of hardware register.Eric Anholt2011-09-201-4/+6
| | | | We'll only do compute-to-MRF on accesses to this file.
* i965/vs: Handle destinations in the MRF file.Eric Anholt2011-09-201-0/+6
| | | | | We've been referencing MRFs through the HW_REG file so far, but that makes it harder to handle compute-to-MRF and similar optimizations.
* i965/vs: Add a function for how many MRFs get written as part of a SEND.Eric Anholt2011-09-202-0/+39
| | | | | This will be used for compute-to-mrf, which needs to know when MRFs get overwritten.
* i965/vs: Remove dead fields of src_reg.Eric Anholt2011-09-201-2/+0
| | | | | | These were copy and pasted from the FS, and are never used. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vs: Add support for simple algebraic optimizations.Eric Anholt2011-09-203-0/+96
| | | | | | | | | | | | | | We generate silly code for array access, and it's easier to generally support the cleanup than to specifically avoid the bad code in each place we might generate it. Removes 4.6% of instructions from 41.6% of shaders in shader-db, particularly savage2/hon and unigine. v2: Fixes by Ken: Make is_zero/one member functions, and fix a progress flag. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix polygon stipple offset state flagging.Eric Anholt2011-09-201-4/+6
| | | | | | | | | | | _NEW_WINDOW_POS wasn't a real Mesa state flag, but we were missing _NEW_BUFFERS to update the stipple offset when FBO binding or window size changed, and _NEW_POLYGON to update when stippling gets enabled. Fixes oglconform's tristrip test. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Yuanhan Liu <[email protected]>
* i965: Add missing _NEW_POLYGON flag to polygon stipple upload.Eric Anholt2011-09-201-1/+3
| | | | | | | | Because we skip the pattern upload when stippling is disabled, we need to check again when it might have been turned on. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Yuanhan Liu <[email protected]>
* i965: Fix compiler warnings.Eric Anholt2011-09-201-6/+4
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* i965/fs: Implement texelFetch() on Gen4.Kenneth Graunke2011-09-192-4/+18
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Implement texelFetch() on Ivybridge.Kenneth Graunke2011-09-191-4/+21
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Implement texelFetch() on Ironlake and Sandybridge.Kenneth Graunke2011-09-195-2/+17
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: Replace _mesa_rgba_logicop_enabled(ctx) with ↵Ian Romanick2011-09-195-11/+11
| | | | | | | | | | | | ctx->Color.ColorLogicOpEnabled Since GL_EXT_blend_logic_op is removed, _mesa_rgba_logicop_enabled(ctx) just returns ctx->Color.ColorLogicOpEnabled. That seems kind of silly. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: Use ColorLogicOpEnabled instead of _LogicOpEnabledIan Romanick2011-09-194-4/+4
| | | | | | | | | | Since GL_EXT_blend_logic_op is removed, _LogicOpEnabled and ColorLogicOpEnabled always have the same value. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965 new VS: Fix copy propagation of double negatives.Paul Berry2011-09-191-1/+1
| | | | | | | | | | | | | When copy propagating a value into an instruction that negates its argument, we need to invert the sense of the value's "negate" flag, so that -(+x) becomes -x and -(-x) becomes +x. Previously, we were always setting the value's "negate" flag to true in this circumstance, so that both -(+x) and -(-x) turned into -x. Fixes Piglit test vs-double-negative.shader_test. Reviewed-by: Kenneth Graunke <[email protected]>
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