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* i965: Clean up VS constant buffer location setup.Eric Anholt2010-12-091-15/+3
* i965: Fix VS constants regression pre-gen6.Eric Anholt2010-12-091-1/+1
* i965: Drop push-mode reladdr constant loading and always use constant_map.Eric Anholt2010-12-084-93/+96
* radeon: bump mip tree levels to 15Alex Deucher2010-12-091-1/+1
* i965: Drop KIL_NV from the ff/ARB_fp path since it was only used for GLSL.Eric Anholt2010-12-083-21/+0
* i965: Use the new pixel mask location for gen6 ARB_fp KIL instructions.Eric Anholt2010-12-081-2/+8
* i965: Set the render target index in gen6 fixed-function/ARB_fp path.Eric Anholt2010-12-081-0/+7
* i965: Set up the per-render-target blend state on gen6.Eric Anholt2010-12-081-46/+49
* i965: Set up the color masking for the first drawbuffer on gen6.Eric Anholt2010-12-081-0/+9
* r300/compiler: remove at least unused immediates if externals cannot be removedMarek Olšák2010-12-083-8/+6
* r300/compiler: make lowering passes possibly use up to two less tempsMarek Olšák2010-12-081-63/+86
* r300/compiler: handle DPH and XPD in rc_compute_sources_for_writemaskMarek Olšák2010-12-081-0/+5
* r300/compiler: do not print pair/tex/presub program stats for vertex shadersMarek Olšák2010-12-081-16/+30
* r300/compiler: cleanup rc_run_compilerMarek Olšák2010-12-084-15/+36
* r300/compiler: add a function to query program stats (alu, tex, temps..)Marek Olšák2010-12-082-15/+39
* r300/compiler: don't terminate regalloc if we surpass max temps limitMarek Olšák2010-12-081-11/+6
* i965: Don't try to store gen6 (float) blend constant color in bytes.Eric Anholt2010-12-071-1/+1
* i965: Fix flipped value of the not-embedded-in-if on gen6.Eric Anholt2010-12-071-1/+1
* i965: Work around gen6 ignoring source modifiers on math instructions.Eric Anholt2010-12-073-3/+26
* i965: Add disabled debug code for dumping out the WM constant payload.Eric Anholt2010-12-071-0/+15
* i965: Correctly emit constants for aggregate types (array, matrix, struct)Ian Romanick2010-12-071-19/+61
* i965: Always hand the absolute value to RSQ.Eric Anholt2010-12-072-1/+6
* i965: Handle saturates on gen6 math instructions.Eric Anholt2010-12-071-0/+2
* i965: Fix comment about gen6_wm_constants.Eric Anholt2010-12-071-1/+1
* i965: upload WM state for _NEW_POLYGON on sandybridgeZhenyu Wang2010-12-071-1/+1
* r200: Silence uninitialized variable warning.Vinson Lee2010-12-071-0/+1
* i965: set minimum/maximum Point Width on SandybridgeXiang, Haihao2010-12-071-1/+3
* i965: Remove INTEL_DEBUG=glsl_force now that there's no brw_wm_glsl.cEric Anholt2010-12-062-7/+0
* i965: Nuke brw_wm_glsl.c.Eric Anholt2010-12-068-1057/+10
* i965: Add support for the instruction compression bits on gen6.Eric Anholt2010-12-064-47/+91
* i965: Align gen6 push constant size to dispatch width.Eric Anholt2010-12-061-1/+2
* i965: Make the sampler's implied move on gen6 be a raw move.Eric Anholt2010-12-061-1/+1
* i965: Fix up gen6 samplers for their usage by brw_wm_emit.cEric Anholt2010-12-061-7/+9
* i965: Fix gen6 interpolation setup for 16-wide.Eric Anholt2010-12-061-15/+26
* i965: Don't smash a group of coordinates doing gen6 16-wide sampler headers.Eric Anholt2010-12-061-0/+1
* i965: Fix up 16-wide gen6 FB writes after various refactoring.Eric Anholt2010-12-061-9/+8
* i965: Provide delta_xy reg to gen6 non-GLSL path PINTERP.Eric Anholt2010-12-061-8/+6
* i965: Move payload reg setup to compile, not lookup time.Eric Anholt2010-12-069-110/+118
* i965: Fix GS state uploading on SandybridgeZhenyu Wang2010-12-062-5/+14
* i965: fix for flat shading on SandybridgeXiang, Haihao2010-12-061-2/+9
* i965: Fix compile warning about missing opcodes.Eric Anholt2010-12-041-0/+5
* i965: Update gen6 SF state on fragment program change too.Eric Anholt2010-12-041-1/+3
* i965: Update gen6 WM state on compiled program change, not just FP change.Eric Anholt2010-12-041-1/+3
* intel: Add an env var override to execute for a different GPU revision.Eric Anholt2010-12-044-9/+15
* r600c: bump texture limits to hw limitsAlex Deucher2010-12-021-2/+7
* WIN32_THREADS -> WIN32José Fonseca2010-12-021-2/+3
* r300/compiler: disable the swizzle lowering pass in vertex shadersMarek Olšák2010-12-021-1/+0
* i965: add support for polygon mode on Sandybridge.Xiang, Haihao2010-12-021-0/+42
* i965: Add support for loops in the VS.Eric Anholt2010-12-011-25/+33
* i965: Enable IF statements in the VS.Eric Anholt2010-12-011-3/+0
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