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* i965: Add gen8 blend stateBen Widawsky2015-05-181-2/+110
* i965: Add renderbuffer surface indexes to debugBen Widawsky2015-05-181-1/+1
* i965: Add Gen9 surface state decodingBen Widawsky2015-05-186-39/+68
* i965: Add gen8 surface state debug infoBen Widawsky2015-05-182-6/+81
* i965: Add gen7+ sampler state to batch debugBen Widawsky2015-05-182-1/+71
* i965: Add viewport extents (gen8) to batch decodeBen Widawsky2015-05-181-4/+11
* i965: Add all surface types to the batch decodeBen Widawsky2015-05-183-15/+10
* i965: Add string for surface format to tableBen Widawsky2015-05-181-217/+219
* i965/fs: Implement integer multiply without mul/mach.Matt Turner2015-05-181-28/+66
* i965/fs: Rework compression control selection.Matt Turner2015-05-181-3/+6
* i965/fs: Support integer multiplication in SIMD16 on Haswell.Matt Turner2015-05-181-5/+47
* i965/fs: Add set_sechalf() method.Matt Turner2015-05-181-0/+10
* i965/fs: Unrestrict constant propagation into integer multiply.Matt Turner2015-05-181-1/+9
* i965/fs: Lower integer multiplication after optimizations.Matt Turner2015-05-184-64/+70
* i965: Fix textureSize for Lod > 0 with non-mipmap filtersIago Toral Quiroga2015-05-181-2/+4
* i965: Fix FS unit testsIan Romanick2015-05-152-2/+4
* i965/fs: Combine the fs_visitor constructors.Kenneth Graunke2015-05-145-74/+20
* i965: Enable ARB_direct_state_accessFredrik Höglund2015-05-141-0/+1
* i915: Enable ARB_direct_state_accessFredrik Höglund2015-05-141-0/+1
* main: Refactor _mesa_drawbuffers.Laura Ekstrand2015-05-141-1/+2
* main: Refactor _mesa_update_draw_buffer_bounds.Laura Ekstrand2015-05-145-5/+5
* main: Refactor _mesa_update_framebuffer.Laura Ekstrand2015-05-145-5/+5
* main: Rename framebuffer renderbuffer software fallback.Laura Ekstrand2015-05-144-4/+4
* i965: Fix PBO cache coherency issue after _mesa_meta_pbo_GetTexSubImage().Francisco Jerez2015-05-132-2/+31
* i965/fs: set execution size to 8 with simd8 ddy instructionTapani Pälli2015-05-131-0/+1
* i965/cs: drop explicit initialisers in C++ fileDave Airlie2015-05-131-4/+6
* i965/fs: Have component() set the register stride to zero.Francisco Jerez2015-05-121-0/+1
* i965/fs: Fix offset() for registers with zero stride.Francisco Jerez2015-05-121-2/+3
* i965: Don't forget the force_sechalf flag in lower_load_payload().Francisco Jerez2015-05-121-0/+1
* i965: Document brw_mask_reg().Francisco Jerez2015-05-121-1/+5
* i965: Use predicate enable bit for conditional rendering w/o stallingNeil Roberts2015-05-129-12/+240
* i956: Add a function to load a 64-bit register from a bufferNeil Roberts2015-05-122-14/+46
* i965: Store the command parser version number in intel_screenNeil Roberts2015-05-122-1/+14
* i965/fs: Add missing initializer in fs_visitor().Matt Turner2015-05-111-1/+1
* egl/swrast: Enable config extension for swrastAxel Davy2015-05-111-0/+1
* i965/fs: Disable opt_sampler_eot for textureGatherNeil Roberts2015-05-111-0/+10
* nir: Delete all traces of nir_op_flogIan Romanick2015-05-081-3/+0
* nir: Delete all traces of nir_op_fexpIan Romanick2015-05-081-1/+0
* i965/fs: Improve a comment about stripping trailing zeroesNeil Roberts2015-05-081-3/+6
* i965/skl: In opt_sampler_eot always set destination register to nullNeil Roberts2015-05-081-1/+1
* i965/fs: Set the header_size on LOAD_PAYLOAD in opt_sampler_eotNeil Roberts2015-05-081-0/+1
* i965/wm/gen6: Add option for disabling statistics collectionTopi Pohjolainen2015-05-072-4/+13
* i965/wm/gen6: Refactor state setupTopi Pohjolainen2015-05-072-45/+77
* i965: Remove unused variablesAnuj Phogat2015-05-071-2/+0
* i965: Change the order of conditions tested in ifAnuj Phogat2015-05-071-3/+4
* i965/sync: Implement DRI2_Fence extensionChad Versace2015-05-073-39/+158
* i965/sync: Replace prefix 'intel_sync' -> 'intel_gl_sync'Chad Versace2015-05-072-28/+31
* i915/sync: Return early when calloc failsChad Versace2015-05-071-0/+2
* i965/sync: Return NULL when calloc failsChad Versace2015-05-071-0/+2
* i915/sync: Don't crash when deleting sync objectChad Versace2015-05-071-1/+3
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