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path: root/src/mesa/drivers
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* i965: Replace reg_type_size[] with a function.Matt Turner2017-01-203-25/+75
* i965: Validate math instruction sources.Matt Turner2017-01-202-9/+23
* i965: Claim that SEND/math has two sources.Matt Turner2017-01-201-1/+8
* i965: Simplify num_sources_from_inst().Matt Turner2017-01-201-3/+1
* i965: Factor out send_restrictions() function.Matt Turner2017-01-201-12/+22
* i965: Factor out sources_not_null() validation function.Matt Turner2017-01-201-17/+23
* i965: Structure code so unsupported inst will not generate more errors.Matt Turner2017-01-201-2/+5
* i965: Add a test for the EU assembly validator.Matt Turner2017-01-202-0/+176
* i965: Add a CHECK macro to call more complicated validation funcs.Matt Turner2017-01-201-0/+9
* i965: Make ERROR_IF usable from other functions.Matt Turner2017-01-201-1/+1
* i965: Mark error annotation on correct SIMD16 inst.Matt Turner2017-01-201-2/+2
* i965/vec4: Use UW-typed operands when dest is UW.Matt Turner2017-01-201-4/+6
* i965: Use W-typed immediate in brw_F32TO16().Matt Turner2017-01-201-1/+1
* i965: Don't change F->VF if dest type is DF.Matt Turner2017-01-201-1/+2
* i965: Remove unnecessary mt->compressed checksAnuj Phogat2017-01-191-12/+4
* i965: Fix indentation in brw_miptree_layout_2d()Anuj Phogat2017-01-191-3/+2
* i965: Fix comment to include 3d texturesAnuj Phogat2017-01-191-1/+2
* i965: Delete pending CCS and HiZ ops in intel_miptree_make_shareable()Chad Versace2017-01-191-0/+16
* mesa/glsl/i965: set and use tcs vertices_out directlyTimothy Arceri2017-01-191-4/+2
* i965: get outputs_written from gl_programTimothy Arceri2017-01-191-2/+2
* i965/blorp: Make post draw flush more explicitTopi Pohjolainen2017-01-182-5/+22
* i965/gen6: Issue direct depth stall and flush after depth clearTopi Pohjolainen2017-01-181-1/+6
* i965: Make depth clear flushing more explicitTopi Pohjolainen2017-01-182-8/+57
* i965/blorp: Use the render cache mechanism instead of explicit flushingTopi Pohjolainen2017-01-181-1/+7
* i965: Make brw_cache_item structure private to brw_program_cache.c.Kenneth Graunke2017-01-182-19/+21
* i965: Fix SURFACE_STATE to handle non-zero aux offsetsBen Widawsky2017-01-181-2/+1
* i965: Don't map/unmap in brw_print_program_cache on LLC platforms.Kenneth Graunke2017-01-171-2/+4
* i965: Move program cache printing to brw_program_cache.c.Kenneth Graunke2017-01-173-57/+49
* i965: Make a helper for finding an existing shader variant.Kenneth Graunke2017-01-177-85/+68
* i965: Make DCE set null destinations on messages with side effects.Kenneth Graunke2017-01-171-13/+41
* i965: Combine some dead code elimination NOP'ing code.Kenneth Graunke2017-01-171-8/+1
* i965: Make DCE explicitly not eliminate any control flow instructions.Kenneth Graunke2017-01-171-3/+2
* i965: Make BLORP disable the NP Z PMA stall fix.Kenneth Graunke2017-01-161-0/+4
* i965: Enable OpenGL 4.5 on Haswell.Kenneth Graunke2017-01-162-2/+2
* i965: Use align1 mode for barrier messages.Kenneth Graunke2017-01-151-0/+3
* i965: Move Gen4-5 interpolation stuff to brw_wm_prog_data.Kenneth Graunke2017-01-1311-70/+52
* i965/vec4: Fix mapping attributesJuan A. Suarez Romero2017-01-132-23/+11
* i965: Fix textureGather with RG32I/UI on Gen7.Kenneth Graunke2017-01-132-8/+37
* xlib: Unify the style of function pointer calls in structsBoyan Ding2017-01-131-74/+74
* radeon: Unify the style of function pointer calls in structsBoyan Ding2017-01-133-17/+17
* nouveau: Unify the style of function pointer calls in structsBoyan Ding2017-01-131-3/+3
* i915: Add XRGB8888 format to intel_screen_make_configsDerek Foreman2017-01-131-1/+2
* nir/i965: assert first is always less than 64Juan A. Suarez Romero2017-01-121-0/+1
* i965/gen7: expose OpenGL 4.2 on Haswell when supportedJuan A. Suarez Romero2017-01-122-2/+2
* i965: enable ARB_shader_precision to HSW+Samuel Iglesias Gonsálvez2017-01-121-1/+1
* i965: unify the code to enable of ARB_gpu_shader_fp64 and ARB_vertex_attrib_6...Samuel Iglesias Gonsálvez2017-01-121-7/+2
* i965: Enable ARB_vertex_attrib_64bit for HaswellAlejandro Piñeiro2017-01-121-1/+3
* i965: check for dual slot attributes on any genJuan A. Suarez Romero2017-01-121-2/+1
* i965/vec4: emit correctly load_inputs for 64bit dataJuan A. Suarez Romero2017-01-121-6/+15
* i965/vec4: take into account doubles when creating attribute mappingAlejandro Piñeiro2017-01-121-4/+9