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* i965: Stop updating FBO state on drawbuffers change.Eric Anholt2013-06-251-8/+0
* i965: Stop recomputing drawbuffer bounds on drawbuffer change.Eric Anholt2013-06-251-2/+0
* i965: Remove _NEW_DEPTH state flagging on drawbuffers change.Eric Anholt2013-06-252-3/+1
* intel: Stop doing special _NEW_STENCIL state flagging on drawbuffers.Eric Anholt2013-06-254-10/+5
* i965: Stop flagging viewport/scissor change on drawbuffers change.Eric Anholt2013-06-251-3/+0
* i965: Stop flagging _NEW_POLYGON on drawbuffers change.Eric Anholt2013-06-251-5/+0
* radeon: Remove gratuitous custom framebuffer resize code.Eric Anholt2013-06-251-31/+0
* intel: Remove gratuitous custom framebuffer resize code.Eric Anholt2013-06-251-30/+6
* mesa: Remove the Initialized field from framebuffers.Eric Anholt2013-06-255-8/+0
* mesa: Remove Driver.GetBufferSize and its callers.Eric Anholt2013-06-256-6/+0
* mesa: Use shared code for converting shader targets to short strings.Eric Anholt2013-06-211-5/+4
* glsl: Remove ir_print_visitor.h includes and usageEric Anholt2013-06-219-11/+2
* gen7: fix GPU hang on WebGL texture-size testJordan Justen2013-06-181-1/+1
* intel: Remove unused IS_POWER_OF_TWO() macro.Eric Anholt2013-06-181-2/+0
* intel: Allow blorp CopyTexSubImage to nonzero destination slices.Eric Anholt2013-06-173-14/+9
* intel: Allow blit CopyTexSubImage to nonzero destination slices.Eric Anholt2013-06-171-14/+9
* intel: Directly implement blit glBlitFramebuffer instead of awkward reuse.Eric Anholt2013-06-173-70/+72
* intel: Move XRGB->ARGB blit logic into intel_miptree_blit().Eric Anholt2013-06-174-100/+63
* intel: Fix Y tiling support for glCopyTexSubImage's alpha override.Eric Anholt2013-06-171-4/+4
* intel: Make batch macros for doing BCS_SWCTRL setup.Eric Anholt2013-06-171-37/+47
* mesa: Hide weirdness of 1D_ARRAY textures from Driver.CopyTexSubImage().Eric Anholt2013-06-174-10/+18
* i965: Assume flexible hardware primitive restart exists in the future.Kenneth Graunke2013-06-141-1/+1
* i965: Shrink Gen5 VUE map layout to be the same as Gen4.Chris Forbes2013-06-166-40/+7
* i965: Implement 16-wide math on G45 and Ironlake.Kenneth Graunke2013-06-162-0/+28
* mesa: fix OES_EGL_image_external being partially allowed in the core profileMarek Olšák2013-06-131-1/+2
* i965/gen7: Enable support for fast color clears.Paul Berry2013-06-121-0/+20
* i965/gen7+: Disable fast color clears on shared regions.Paul Berry2013-06-124-0/+42
* i965/gen7+: Resolve color buffers when necessary.Paul Berry2013-06-127-3/+37
* i965/gen7+: Ensure that front/back buffers are fast-clear resolved.Paul Berry2013-06-123-12/+15
* i965/blorp: Write blorp code to do render target resolves.Paul Berry2013-06-126-0/+96
* i965/blorp: Expand clear class hierarchy to prepare for RT resolves.Paul Berry2013-06-122-25/+35
* i965/gen7+: Implement fast color clear operation in BLORP.Paul Berry2013-06-129-14/+240
* i965/gen7+: Create helper functions for single-sample MCS buffers.Paul Berry2013-06-122-0/+128
* i965/gen7+: Set up MCS in SURFACE_STATE whenever MCS is present.Paul Berry2013-06-123-5/+7
* i965/gen7+: Create an enum for keeping track of fast color clear state.Paul Berry2013-06-126-0/+104
* intel: Conditionally compile mcs-related code for i965 only.Paul Berry2013-06-122-1/+9
* intel: Keep region name in intel_miptree_create_for_dri2_buffer().Paul Berry2013-06-121-0/+1
* i965: Emit the depth/stencil state pointer directly, not via atoms.Kenneth Graunke2013-06-117-80/+18
* i965: Emit the CC state pointer directly rather than via atoms.Kenneth Graunke2013-06-115-30/+18
* i965: Emit the BLEND_STATE pointer directly rather than via atoms.Kenneth Graunke2013-06-115-30/+18
* Revert "i965: Disable unused pipeline stages once at startup on Gen7+."Kenneth Graunke2013-06-113-6/+13
* i965/vs: Avoid the MUL/MACH/MOV sequence for small integer multiplies.Eric Anholt2013-06-101-13/+37
* i965/vs: Allow copy propagation into MUL/MACH.Eric Anholt2013-06-101-2/+4
* i965/vs: Use the MAD instruction when possible.Eric Anholt2013-06-104-0/+43
* intel: Reserve less batchbuffer space.Kenneth Graunke2013-06-101-4/+3
* i965: Allocate push constant L3 space once at startup on Gen7+.Kenneth Graunke2013-06-104-12/+4
* i965: Disable unused pipeline stages once at startup on Gen7+.Kenneth Graunke2013-06-103-13/+9
* i965: Don't emit PIPELINE_SELECT from BLORP.Kenneth Graunke2013-06-101-19/+0
* i965: Emit invariant state once at startup on Gen6+.Kenneth Graunke2013-06-103-4/+20
* i965: Delete some dead state atom prototypes.Kenneth Graunke2013-06-101-9/+0
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