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* Merge branch 'mesa_7_5_branch'Brian Paul2009-05-182-8/+21
|\ | | | | | | | | | | | | Conflicts: Makefile src/mesa/main/version.h
| * r300: Make sure to drop current hardware state reference to texture objects.Michel Dänzer2009-05-142-8/+21
| | | | | | | | Fixes potential texture object leaks.
* | intel: Don't complain on falling back from PBO fastpaths.Eric Anholt2009-05-151-3/+3
| | | | | | | | | | | | Instead, stash the debug info under the handy debug flag. Bug #20053
* | i915: Fix 945 cube map layout for the small mipmaps along the bottom.Steinar H. Gunderson2009-05-151-2/+14
| | | | | | | | Bug #21691.
* | i915: Use Stencil.Enabled instead of Stencil._Enabled in DrawBuffers.Eric Anholt2009-05-151-1/+1
| | | | | | | | | | | | | | | | The _Enabled field isn't updated at the point that DrawBuffers is called, and the Driver.Enable() function does the testing for stencil buffer presence anyway. bug #21608 for Radeon
* | i915: Only use the new 945 cube layout for compressed textures.Eric Anholt2009-05-151-1/+4
| | | | | | | | | | | | | | | | | | The docs actually explain this, but not in a terribly clear manner. This nearly fixes the piglit cubemap testcase, except that something's going wrong with the nearest filtering at 2x2 sizes in the testcase. Looks good by visual inspection, though. Bug #21692
* | i965: Fix varying payload reg assignment for the non-GLSL-instructions path.Eric Anholt2009-05-141-8/+10
| | | | | | | | I don't have a testcase for this, but it seems clearly wrong.
* | i965: Fix register allocation of GLSL fp inputs.Eric Anholt2009-05-144-13/+27
| | | | | | | | | | | | | | | | | | Before, if the VP output something that is in the attributes coming into the WM but which isn't used by the WM, then WM would end up reading subsequent varyings from the wrong places. This was visible with a GLSL demo using gl_PointSize in the VS and a varying in the WM, as point size is in the VUE but not used by the WM. There is now a regression test in piglit, glsl-unused-varying.
* | intel: Use FRONT_AND_BACK for StencilOp as well.Eric Anholt2009-05-141-1/+2
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* | intel: Use GL_FRONT_AND_BACK for stencil clearing.Eric Anholt2009-05-141-1/+2
| | | | | | | | | | This comes from a radeon-rewrite fallback fix, but may also fix stencil clear failure when the polygon winding mode is flipped.
* | i965: fix 1D texture borders with GL_CLAMP_TO_BORDERRobert Ellison2009-05-141-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With 1D textures, GL_TEXTURE_WRAP_T should be ignored (only GL_TEXTURE_WRAP_S should be respected). But the i965 hardware seems to follow the value of GL_TEXTURE_WRAP_T even when sampling 1D textures. This fix forces GL_TEXTURE_WRAP_T to be GL_REPEAT whenever 1D textures are used; this allows the texture to be sampled correctly, avoiding "imaginary" border elements in the T direction. This bug was demonstrated in the Piglit tex1d-2dborder test. With this fix, that test passes.
* | i965: send all warnings through _mesa_warning()Robert Ellison2009-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | One warning message: drm_i915_getparam: -22 was still being sent to fprintf(). This causes all Piglit tests to fail, even with MESA_DEBUG=0. Using _mesa_warning() to emit the message allows the general Mesa controls for messages like this to be applied.
* | Merge branch 'mesa_7_5_branch'Brian Paul2009-05-131-1/+2
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| * intel: added null ptr checkBrian Paul2009-05-131-1/+2
| | | | | | | | Fixes segfault in context tear-down when glClear was never called.
* | intel: enable GL_APPLE_vertex_array_objectBrian Paul2009-05-131-0/+2
| | | | | | | | No special driver changes are needed for this extension.
* | Merge branch 'mesa_7_5_branch'Brian Paul2009-05-133-29/+75
|\| | | | | | | | | | | | | | | Conflicts: src/mesa/main/arrayobj.c src/mesa/main/arrayobj.h src/mesa/main/context.c
| * intel: create a private gl_array_object for intel_clear_tris(), fix bug 21638Brian Paul2009-05-133-29/+75
| | | | | | | | | | | | | | | | | | gl_array_object encapsulates a set of vertex arrays (see the GL_APPLE_vertex_array_object extension). Create a private gl_array_object for drawing the quad for intel_clear_tris() so we don't have to worry about the user's vertex array state. This fixes the no-op glClear bug #21638 and removes the need to call _mesa_PushClientAttrib() and _mesa_PopClientAttrib().
| * Test either GL_FRONT_LEFT or GL_FRONT for front-buffer renderingIan Romanick2009-05-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | For non-stereo visuals, which is all we support, we treat GL_FRONT_LEFT as GL_FRONT. However, they are technically different, and they have different enum values. Test for either one to determine if we're in front-buffer rendering mode. This fix was suggested by Pierre Willenbrock. Signed-off-by: Ian Romanick <[email protected]> (cherry picked from commit 2085cf24628be7cd297ab0f9ef5ce02bd5a006e2)
* | i965: enable additional code in emit_fb_write()Brian Paul2009-05-121-11/+10
| | | | | | | | Not 100% sure this is right, but the invalid assertion is fixed...
* | i965: increase BRW_EU_MAX_INSNBrian Paul2009-05-121-1/+1
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* | i965: commentBrian Paul2009-05-121-0/+4
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* | intel: Skip the DRI2 renderbuffer update when doing Viewport on an FBO.Eric Anholt2009-05-121-1/+1
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* | intel: Map write-only buffer objects through the GTT when possible.Eric Anholt2009-05-122-2/+15
| | | | | | | | | | This looks to be a win of a few percent in cairogears with new vbo code, thanks to not polluting caches.
* | i915: Fix driver after HW glGenerateMipmap commit.Eric Anholt2009-05-121-0/+1
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* | i965: handle extended swizzle terms (0,1) in get_src_reg()Brian Paul2009-05-111-0/+8
| | | | | | | | Fixes failed assertion in progs/glsl/twoside.c (but still wrong rendering).
* | i965: improve debug loggingRobert Ellison2009-05-083-14/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Looking for memory leaks that were causing crashes in my environment in a situation where valgrind would not work, I ended up improving the i965 debug traces so I could better see where the memory was being allocated and where it was going, in the regions and miptrees code, and in the state caches. These traces were specific enough that external scripts could determine what elements were not being released, and where the memory leaks were. I also ended up creating my own backtrace code in intel_regions.c, to determine exactly where regions were being allocated and for what, since valgrind wasn't working. Because it was useful, I left it in, but disabled and compiled out. It can be activated by changing a flag at the top of the file.
* | i965: fix memory leak in context/renderbuffer region managementRobert Ellison2009-05-081-4/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A temporary change to the intelMakeCurrent() function to make it work with frame buffer objects causes the static regions associated with the context (the front_region, back_region, and depth_region) to take on an additional reference, with no corresponding release. This causes a memory leak if a program repeatedly creates and destroys contexts. The fix is the corresponding hack, to unreference these regions when the context is deleted, but only if the framebuffer objects are still present and the same regions are still referenced within. Both sets of code have comment blocks referring to each other.
* | i965: fix segfault on low memory conditionsRobert Ellison2009-05-081-0/+7
| | | | | | | | | | | | | | When out of memory (in at least one case, triggered by a longrunning memory leak), this code will segfault and crash. By checking for the out-of-memory condition, the system can continue, and will report the out-of-memory error later, a much preferable outcome.
* | intel: Add a metaops version of glGenerateMipmapEXT/SGIS_generate_mipmaps.Eric Anholt2009-05-0810-76/+303
| | | | | | | | | | | | | | In addition to being HW accelerated, it avoids the incorrect (black) rendering of the mipmaps that SW was doing in fbo-generatemipmap. Improves the performance of the mipmap generation and drawing in fbo-generatemipmap by 30%.
* | intel: Put the constant texcoords used in metaops into a vbo.Eric Anholt2009-05-085-40/+102
| | | | | | | | | | | | | | Make this be its own function for setup/teardown of the binding of these texcoords. No performance difference in the engine demo (I just felt dirty not using a VBO for this), and I think it should be more resilient to interference from current GL state.
* | i965: const qualifiersBrian Paul2009-05-081-2/+2
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* | i965: don't use GRF regs 126,127 for WM programsBrian Paul2009-05-082-5/+28
| | | | | | | | | | | | | | They seem to be used for something else and using them for shader temps seems to lead to GPU lock-ups. Call _mesa_warning() when we run out of temps. Also, clean up some debug code.
* | i965: relAddr local var (to make debug/test a little easier)Brian Paul2009-05-071-5/+6
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* | i965: Remove bad constant buffer constant-reg-already-loaded optimization.Eric Anholt2009-05-061-13/+11
| | | | | | | | | | | | | | Thanks to branching, the state of c->current_const[i].index at the point of emitting constant loads for this instruction may not match the actual constant currently loaded in the reg at runtime. Fixes a regression in my GLSL program for idr's class since b58b3a786aa38dcc9d72144c2cc691151e46e3d5.
* | intel: Unmap buffers if needed at DeleteBuffer time.Eric Anholt2009-05-061-1/+10
| | | | | | | | | | | | | | This fixes a crash in glean's pbo test, which tripped over the assert when a context was destroyed while a buffer was still mapped (Mesa doesn't call UnmapBuffer in that case). Regression in c6bde8873fbda6d8467600b7491d8543c75b0509
* | i965: Remove the forced lack of caching for renderbuffer surface state.Eric Anholt2009-05-061-11/+8
| | | | | | | | | | | | | | | | | | This snuck in with the multi-draw-buffers commit, and is a major penalty to performance. It doesn't appear to be required, as the only dependency the surface BO has is on the state key (and if there's some other dependency, it should just be in the key). This brings openarena performance up to almost 2% faster than Mesa 7.4.
* | i965: Remove _NEW_PROGRAM from brw_wm_surfaces setup dependencies.Eric Anholt2009-05-061-2/+1
| | | | | | | | This was a leftover from the brw_wm_constant_buffer change.
* | i965: Split WM constant buffer update from other WM surfaces.Eric Anholt2009-05-065-90/+95
| | | | | | | | | | | | | | | | This can avoid re-uploading constant data when it isn't necessary, and is a step towards not updating other surfaces just because constants change. It also brings the upload of the constant buffer next to the creation. This brings openarena performance up another 4%, to 91% of the Mesa 7.4 branch.
* | i965: Disentangle VS constant surface state from WM surface state.Eric Anholt2009-05-067-186/+255
| | | | | | | | | | Also, only create VS surface state if there's a VS constant buffer to be uploaded, and set the contents of the buffer at the same time as creation.
* | i965: Don't create constant buffers if they won't be used.Eric Anholt2009-05-061-1/+17
| | | | | | | | | | | | | | | | Really, the creation and upload of constants should be in the same place, since they should only happen together, and a state flag should be triggered by them so that we don't thrash state around so much for just updating constants. But this still recovers openarena performance by another 19%, leaving us 16% behind Mesa 7.4 branch.
* | mesa: in glReadBufer() set _NEW_BUFFERS, not _NEW_PIXELBrian Paul2009-05-015-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since GL_READ_BUFFER is historically part of the gl_pixel_attrib group it made sense to signal changes with _NEW_PIXEL. But now with FBOs it's also part of the framebuffer state. Now _NEW_PIXEL strictly indicates pixels transfer state changes. This change avoids framebuffer state validation when any random bit of pixel-transfer state is set. DRI drivers updated too: don't check _NEW_COLOR when updating framebuffer state. I think that was just copied from the Xlib driver because we care about dither enable/disable state there.
* | Test either GL_FRONT_LEFT or GL_FRONT for front-buffer renderingIan Romanick2009-05-011-1/+2
| | | | | | | | | | | | | | | | | | | | | | For non-stereo visuals, which is all we support, we treat GL_FRONT_LEFT as GL_FRONT. However, they are technically different, and they have different enum values. Test for either one to determine if we're in front-buffer rendering mode. This fix was suggested by Pierre Willenbrock. Signed-off-by: Ian Romanick <[email protected]>
* | Merge branch 'const-buffer-changes'Brian Paul2009-05-0114-200/+350
|\ \ | |/ |/| | | | | | | | | | | Conflicts: src/mesa/drivers/dri/i965/brw_curbe.c src/mesa/drivers/dri/i965/brw_vs_emit.c src/mesa/drivers/dri/i965/brw_wm_glsl.c
| * i965: #include prog_print.h to silence warningBrian Paul2009-04-271-0/+1
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| * i965: only upload constant buffer data when we actually need the const bufferBrian Paul2009-04-276-17/+22
| | | | | | | | | | | | | | | | | | Make the use_const_buffer field per-program and only call the code which updates the constant buffer's data if the flag is set. This should undo the perf regression from 20f3497e4b6756e330f7b3f54e8acaa1d6c92052 (cherry picked from master, commit dc9705d12d162ba6d087eb762e315de9f97bc456)
| * i965: rework GLSL/WM register allocationBrian Paul2009-04-242-48/+168
| | | | | | | | | | | | | | | | | | Use a bitvector of used/free flags. If we run out of temps, examine the live intervals of the temp regs in the program and free those which are no longer alive. Also, enable the new WM const buffer code.
| * i965: disable debug printfBrian Paul2009-04-221-1/+1
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| * i965: enable VS constant buffersBrian Paul2009-04-221-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In the VS constants can now be handled in two different ways: 1. If there's room in the GRF, put constants there. They're preloaded from the CURBE prior to VS execution. This is the historical approach. The problem is the GRF may not have room for all the shader's constants and temps and misc registers. Hence... 2. Use a separate constant buffer which is read from using a READ message. This allows a very large number of constants and frees up GRF regs for shader temporaries. This is the new approach. May be a little slower than 1. 1 vs. 2 is chosen according to how many constants and temps the shader needs.
| * i965: define BRW_MAX_GRFBrian Paul2009-04-221-0/+3
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| * i965: remove old code to init surface-related cache IDsBrian Paul2009-04-221-14/+0
| | | | | | | | These types are only found in the new surface state cache now.
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