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* intel: Add support for tiled textures.Eric Anholt2009-06-0413-44/+120
| | | | | | | | | | This is about a 30% performance win in OA with high settings on my GM45, and experiments with 915GM indicate that it'll be around a 20% win there. Currently, 915-class hardware is seriously hurt by the fact that we use fence regs to control the tiling even for 3D instructions that could live without them, so we spend a bunch of time waiting on previous rendering in order to pull fences off. Thus, the texture_tiling driconf option defaults off there for now.
* i915: Don't rely on fence regs when we don't have to.Eric Anholt2009-06-048-62/+55
| | | | | We're on the way to telling the kernel about when we need fence regs on our objects or not, and this will cut the number of places needing them.
* i915: Remove some long-dead i830 code.Eric Anholt2009-06-041-20/+0
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* mesa: plug in new _mesa_CopyBufferSubData() functionsBrian Paul2009-06-021-0/+3
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* glapi: regenerated files for GL_ARB_copy_bufferBrian Paul2009-06-021-8/+22
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* intel: Clip to window after calling Driver.TexImage2DIan Romanick2009-06-021-9/+8
| | | | | | | | | This prevents the width / height from being clipped to the window size before the texture is allocated. This matches intelCopyTexImage1D. This should fix bug #21227 Signed-off-by: Ian Romanick <[email protected]>
* i915: Don't put VBOs in graphics memory unless required for an operation.Eric Anholt2009-06-022-1/+40
| | | | | This saves doing swtnl from uncached memory, which is painful. Improves clutter test-text performance by 10% since it started using VBOs.
* i965: Support OPCODE_TRUNC in the brw_wm_fp.c code.Eric Anholt2009-06-023-1/+18
| | | | This gets two more glean glsl1 tests using the non-GLSL path.
* Use separate $(MINSTALL) for installing librariesDan Nicholson2009-06-011-1/+1
| | | | | | | | | | | | | The special feature of bin/minstall to copy symlinks is only ever needed when installing libraries which may have .so symlinks. All the headers and directories can use a normal install program. These two modes are separated as $(INSTALL) and $(MINSTALL) to allow the user (or autoconf) to override installing normal files as they please. An autoconf check for the install program has been added and will be used in preference to minstall when available. Fixes bug 16053.
* i915: Fall back on NPOT textured metaops on 830-class.Eric Anholt2009-05-263-0/+30
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* i915: Restore the Viewport and DepthRange functions on 8xx.Eric Anholt2009-05-261-0/+21
| | | | | | | Fixes failed viewport updates on glxgears (and other apps) resize since e41780fedc2c1f22b43118da30a0103fa68b769f. Bug #20473.
* intel: Override MaxRenderbufferSize with hardware constraintsChris Wilson2009-05-261-0/+7
| | | | | Limit the maximum renderbuffer size to 8192 on i965 and to 2048 on earlier hardware.
* i965: fix whitespace in brw_tex_layout.cEric Anholt2009-05-211-32/+31
| | | | | The broken indentation was driving me crazy, so fix other stuff while I'm here.
* i956: Make state dependency of SF on drawbuffer bounds match Mesa's.Eric Anholt2009-05-211-2/+5
| | | | | | Noticed while debugging a weird 1D FBO testcase that left its existing viewport and projection matrix in place when switching drawbuffers. Didn't fix the testcase, though.
* intel: Fall back on any rendering to texture with no miptree.Eric Anholt2009-05-211-4/+4
| | | | | | Fixes segfault on an fbo.c negative test for FBO with texture width/height of 0. Previously we just tested for border != 0 to work around this segfault.
* intel: Mark the FBO as incomplete if there's no intel_renderbuffer for it.Eric Anholt2009-05-211-0/+5
| | | | | This happens to rendering with textures with a border, which had resulted in a segfault on dereferencing the irb.
* intel: Don't segfault on glGenerateMipmaps of a cube map with one face defined.Eric Anholt2009-05-211-2/+2
| | | | This presumably applies to SGIS_generate_mipmaps as well.
* intel: Use _mesa_CheckFramebufferStatusEXT insteaad of glCheck...Eric Anholt2009-05-211-1/+1
| | | | Fixes a segfault in our oglconform fbo test.
* i965: rename var: s/tmp/vs_inputs/Brian Paul2009-05-211-8/+8
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* Merge branch 'mesa_7_5_branch'Brian Paul2009-05-182-8/+21
|\ | | | | | | | | | | | | Conflicts: Makefile src/mesa/main/version.h
| * r300: Make sure to drop current hardware state reference to texture objects.Michel Dänzer2009-05-142-8/+21
| | | | | | | | Fixes potential texture object leaks.
* | intel: Don't complain on falling back from PBO fastpaths.Eric Anholt2009-05-151-3/+3
| | | | | | | | | | | | Instead, stash the debug info under the handy debug flag. Bug #20053
* | i915: Fix 945 cube map layout for the small mipmaps along the bottom.Steinar H. Gunderson2009-05-151-2/+14
| | | | | | | | Bug #21691.
* | i915: Use Stencil.Enabled instead of Stencil._Enabled in DrawBuffers.Eric Anholt2009-05-151-1/+1
| | | | | | | | | | | | | | | | The _Enabled field isn't updated at the point that DrawBuffers is called, and the Driver.Enable() function does the testing for stencil buffer presence anyway. bug #21608 for Radeon
* | i915: Only use the new 945 cube layout for compressed textures.Eric Anholt2009-05-151-1/+4
| | | | | | | | | | | | | | | | | | The docs actually explain this, but not in a terribly clear manner. This nearly fixes the piglit cubemap testcase, except that something's going wrong with the nearest filtering at 2x2 sizes in the testcase. Looks good by visual inspection, though. Bug #21692
* | i965: Fix varying payload reg assignment for the non-GLSL-instructions path.Eric Anholt2009-05-141-8/+10
| | | | | | | | I don't have a testcase for this, but it seems clearly wrong.
* | i965: Fix register allocation of GLSL fp inputs.Eric Anholt2009-05-144-13/+27
| | | | | | | | | | | | | | | | | | Before, if the VP output something that is in the attributes coming into the WM but which isn't used by the WM, then WM would end up reading subsequent varyings from the wrong places. This was visible with a GLSL demo using gl_PointSize in the VS and a varying in the WM, as point size is in the VUE but not used by the WM. There is now a regression test in piglit, glsl-unused-varying.
* | intel: Use FRONT_AND_BACK for StencilOp as well.Eric Anholt2009-05-141-1/+2
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* | intel: Use GL_FRONT_AND_BACK for stencil clearing.Eric Anholt2009-05-141-1/+2
| | | | | | | | | | This comes from a radeon-rewrite fallback fix, but may also fix stencil clear failure when the polygon winding mode is flipped.
* | i965: fix 1D texture borders with GL_CLAMP_TO_BORDERRobert Ellison2009-05-141-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With 1D textures, GL_TEXTURE_WRAP_T should be ignored (only GL_TEXTURE_WRAP_S should be respected). But the i965 hardware seems to follow the value of GL_TEXTURE_WRAP_T even when sampling 1D textures. This fix forces GL_TEXTURE_WRAP_T to be GL_REPEAT whenever 1D textures are used; this allows the texture to be sampled correctly, avoiding "imaginary" border elements in the T direction. This bug was demonstrated in the Piglit tex1d-2dborder test. With this fix, that test passes.
* | i965: send all warnings through _mesa_warning()Robert Ellison2009-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | One warning message: drm_i915_getparam: -22 was still being sent to fprintf(). This causes all Piglit tests to fail, even with MESA_DEBUG=0. Using _mesa_warning() to emit the message allows the general Mesa controls for messages like this to be applied.
* | Merge branch 'mesa_7_5_branch'Brian Paul2009-05-131-1/+2
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| * intel: added null ptr checkBrian Paul2009-05-131-1/+2
| | | | | | | | Fixes segfault in context tear-down when glClear was never called.
* | intel: enable GL_APPLE_vertex_array_objectBrian Paul2009-05-131-0/+2
| | | | | | | | No special driver changes are needed for this extension.
* | Merge branch 'mesa_7_5_branch'Brian Paul2009-05-133-29/+75
|\| | | | | | | | | | | | | | | Conflicts: src/mesa/main/arrayobj.c src/mesa/main/arrayobj.h src/mesa/main/context.c
| * intel: create a private gl_array_object for intel_clear_tris(), fix bug 21638Brian Paul2009-05-133-29/+75
| | | | | | | | | | | | | | | | | | gl_array_object encapsulates a set of vertex arrays (see the GL_APPLE_vertex_array_object extension). Create a private gl_array_object for drawing the quad for intel_clear_tris() so we don't have to worry about the user's vertex array state. This fixes the no-op glClear bug #21638 and removes the need to call _mesa_PushClientAttrib() and _mesa_PopClientAttrib().
| * Test either GL_FRONT_LEFT or GL_FRONT for front-buffer renderingIan Romanick2009-05-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | For non-stereo visuals, which is all we support, we treat GL_FRONT_LEFT as GL_FRONT. However, they are technically different, and they have different enum values. Test for either one to determine if we're in front-buffer rendering mode. This fix was suggested by Pierre Willenbrock. Signed-off-by: Ian Romanick <[email protected]> (cherry picked from commit 2085cf24628be7cd297ab0f9ef5ce02bd5a006e2)
* | i965: enable additional code in emit_fb_write()Brian Paul2009-05-121-11/+10
| | | | | | | | Not 100% sure this is right, but the invalid assertion is fixed...
* | i965: increase BRW_EU_MAX_INSNBrian Paul2009-05-121-1/+1
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* | i965: commentBrian Paul2009-05-121-0/+4
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* | intel: Skip the DRI2 renderbuffer update when doing Viewport on an FBO.Eric Anholt2009-05-121-1/+1
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* | intel: Map write-only buffer objects through the GTT when possible.Eric Anholt2009-05-122-2/+15
| | | | | | | | | | This looks to be a win of a few percent in cairogears with new vbo code, thanks to not polluting caches.
* | i915: Fix driver after HW glGenerateMipmap commit.Eric Anholt2009-05-121-0/+1
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* | i965: handle extended swizzle terms (0,1) in get_src_reg()Brian Paul2009-05-111-0/+8
| | | | | | | | Fixes failed assertion in progs/glsl/twoside.c (but still wrong rendering).
* | i965: improve debug loggingRobert Ellison2009-05-083-14/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Looking for memory leaks that were causing crashes in my environment in a situation where valgrind would not work, I ended up improving the i965 debug traces so I could better see where the memory was being allocated and where it was going, in the regions and miptrees code, and in the state caches. These traces were specific enough that external scripts could determine what elements were not being released, and where the memory leaks were. I also ended up creating my own backtrace code in intel_regions.c, to determine exactly where regions were being allocated and for what, since valgrind wasn't working. Because it was useful, I left it in, but disabled and compiled out. It can be activated by changing a flag at the top of the file.
* | i965: fix memory leak in context/renderbuffer region managementRobert Ellison2009-05-081-4/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A temporary change to the intelMakeCurrent() function to make it work with frame buffer objects causes the static regions associated with the context (the front_region, back_region, and depth_region) to take on an additional reference, with no corresponding release. This causes a memory leak if a program repeatedly creates and destroys contexts. The fix is the corresponding hack, to unreference these regions when the context is deleted, but only if the framebuffer objects are still present and the same regions are still referenced within. Both sets of code have comment blocks referring to each other.
* | i965: fix segfault on low memory conditionsRobert Ellison2009-05-081-0/+7
| | | | | | | | | | | | | | When out of memory (in at least one case, triggered by a longrunning memory leak), this code will segfault and crash. By checking for the out-of-memory condition, the system can continue, and will report the out-of-memory error later, a much preferable outcome.
* | intel: Add a metaops version of glGenerateMipmapEXT/SGIS_generate_mipmaps.Eric Anholt2009-05-0810-76/+303
| | | | | | | | | | | | | | In addition to being HW accelerated, it avoids the incorrect (black) rendering of the mipmaps that SW was doing in fbo-generatemipmap. Improves the performance of the mipmap generation and drawing in fbo-generatemipmap by 30%.
* | intel: Put the constant texcoords used in metaops into a vbo.Eric Anholt2009-05-085-40/+102
| | | | | | | | | | | | | | Make this be its own function for setup/teardown of the binding of these texcoords. No performance difference in the engine demo (I just felt dirty not using a VBO for this), and I think it should be more resilient to interference from current GL state.
* | i965: const qualifiersBrian Paul2009-05-081-2/+2
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