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* i965/vs: Use the sampler for VS pull constant loading on Ivybridge.Kenneth Graunke2012-01-271-0/+17
| | | | | | | | | | | | | | | | | | | Substantially increases performance in GLBenchmark PRO: - 320x240 => 3.28x - 1920x1080 => 1.47x - 2560x1440 => 1.27x The LD message ignores the sampler unit index and SAMPLER_STATE pointer, instead relying on hard-wired default state. Thus, there's no need to worry about running out of sampler units or providing SAMPLER_STATE; this small patch should be all that's required. NOTE: This is a candidate for release branches. (It requires the preceding commit to compile.) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit 259b65e2e7938de4aab323033cfe2b33369ddb07)
* i965: Expose brw_set_sampler_message for use outside brw_eu_emit.c.Kenneth Graunke2012-01-272-10/+22
| | | | | | | | | brw_SAMPLE is full of complex workarounds for original Broadwater hardware, and I'd rather avoid all that for my next Ivybridge patch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit 5f4575d42fdaaf671d4b3cdcf2c733ad9d35d339)
* i965: Set pitch of pull constant buffers to 16.Paul Berry2012-01-272-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | We always access pull constant buffers using the message types "OWord Block Read" or "OWord Dual Block Read". According to the Sandy Bridge PRM, Vol 4 Part 1, pages 214 and 218, when using these messages: "the surface pitch is ignored, the surface is treated as a 1-dimensional surface. An element size (pitch) of 16 bytes is used to determine the size of the buffer for out-of-bounds checking if using the surface state model." Previously we were setting the pitch for pull constant buffers to the size of the whole constant buffer--this made no sense and would have led to incorrect behavior if it were not for the fact that the pitch is ignored. For clarity, this patch sets the pitch for pull constant buffers to 16 bytes, consistent with the hardware's behavior. v2: Clarify the meaning of the ignored values by writing them as (16 - 1). Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit fcd5af4a916b4ba7860ba27eb47404934bde0d08)
* intel: use swrast code to map/unmap renderbuffers for swrast renderingBrian Paul2012-01-271-79/+2
| | | | (cherry picked from commit 89bb19adb08caaefc01e613e9bbfbdd1f366ddab)
* mesa: remove ctx->Driver.Map/UnmapTexture() hooksBrian Paul2012-01-271-2/+0
| | | | | No longer used anywhere. (cherry picked from commit 56d83ac4bf0267982554f25c6fdb3c1dd6e14a9c)
* nouveau: stop calling ctx->Driver.Map/UnmapTexture()Brian Paul2012-01-272-40/+4
| | | | | And remove unused nouveau_texture_map/unmap() (cherry picked from commit 8b8a54afd9b748b7250993393864544ad6961edb)
* intel: remove intel_span_supports_format()Brian Paul2012-01-273-21/+0
| | | | | It always returned True. (cherry picked from commit 1839a7fc9faae81d32ffc0cdc908b933f4524e28)
* dri/swrast: use swrast_renderbuffer typeBrian Paul2012-01-272-35/+41
| | | | (cherry picked from commit becbb643135ddccac5054bf138ca0cc7cc3fff15)
* osmesa: use swrast_renderbufferBrian Paul2012-01-271-42/+45
| | | | (cherry picked from commit 797c18be1f907337ebd85b18ce43dfa0b056f492)
* radeon: derive radeon_renderbuffer from swrast_renderbufferBrian Paul2012-01-2714-64/+73
| | | | (cherry picked from commit c080202db5363a18a759a9a7c82b40ac558c8abe)
* intel: derive intel_renderbuffer from swrast_renderbufferBrian Paul2012-01-277-49/+55
| | | | | Drivers that rely on swrast need to do this, as with swrast_texture_image. (cherry picked from commit 9f8ed9d66298e2dc5dff508e3ea723469fe06d93)
* xlib: derive xmesa_renderbuffer from swrast_renderbufferBrian Paul2012-01-274-24/+27
| | | | (cherry picked from commit d16e71eeb47d1e67930f6e86a80dc926468224d9)
* intel: use intel_rb_format() to get renderbuffer formatBrian Paul2012-01-2711-42/+56
| | | | | This will make future changes cleaner and less invasive. (cherry picked from commit 924de7dc96f4607cb3d833637b5f69f4b9e2a6d0)
* dri/swrast: rename swrast_renderbuffer to dri_swrast_renderbufferBrian Paul2012-01-272-14/+14
| | | | | | To prevent name collision with future swrast_renderbuffer in the swrast module. (cherry picked from commit 1048d55d5fa60d17dd99ac7394ff0572500625f9)
* xlib: remove xm_span.c and related codeBrian Paul2012-01-276-249/+1
| | | | (cherry picked from commit b0f0d7a8118401b209c674804255b5fd9e8c94c0)
* mesa: remove gl_renderbuffer::WrappedBrian Paul2012-01-274-13/+13
| | | | | There's no such thing as renderbuffer wrappers anymore. (cherry picked from commit 59a5b5a193d5d9c5776aa586b34657b6e315479d)
* mesa: rename gl_renderbuffer::Data to BufferBrian Paul2012-01-274-25/+25
| | | | | To better indicate that this pointer to the malloc'd memory. (cherry picked from commit 7a36345f70a0b8ac2d480bb52eb2c74c2be5a978)
* mesa: remove gl_renderbuffer::DataTypeBrian Paul2012-01-2710-117/+17
| | | | (cherry picked from commit f9874feef4d8952df5054bd8e8f4e0deda4ef44f)
* mesa: remove gl_renderbuffer:RowStride fieldBrian Paul2012-01-274-7/+2
| | | | (cherry picked from commit 1e1b5cb01a10e39d01923e3c7e989c44210950cd)
* dri: remove all the obsolete spantmp filesBrian Paul2012-01-274-1259/+0
| | | | (cherry picked from commit 304f7a132741a528ca6e861a918ef59991874e5f)
* radeon: remove obsolete GetRow/PutRow codeBrian Paul2012-01-272-167/+0
| | | | (cherry picked from commit a4c6dedb27897ae1340983b5d12927e0a9fb2212)
* nouveau: remove obsolete GetRow/PutRow codeBrian Paul2012-01-271-85/+0
| | | | (cherry picked from commit f892debdc21d12c40d2b69b4e9efdf527672d3ec)
* intel: remove most of the span Get/PutRow codeBrian Paul2012-01-272-134/+1
| | | | (cherry picked from commit 41869c49421141807ab71cabca4c8a07611f6a64)
* dri/swrast: remove obsolete GetRow/PutRow codeBrian Paul2012-01-275-584/+1
| | | | | | | | | | | | | | | | This is a squash of: dri/swrast: remove obsolete GetRow/PutRow code (cherry picked from commit cb5fa9ea624574909bf57f9e1ad190a440d59dc2) and dri/swrast: remove obsolete swrast_span.c file from source list (cherry picked from commit a9bf149e7f699d05bcf31dff54c4b4cf78018dd0) Conflicts: src/mesa/drivers/dri/swrast/Makefile.sources
* osmesa: remove obsolete GetRow/PutRow codeBrian Paul2012-01-271-430/+1
| | | | (cherry picked from commit 2873555a76a7358db053c3a7b121b489f8df9bb1)
* xlib: remove obsolete GetRow/PutRow codeBrian Paul2012-01-271-1594/+3
| | | | (cherry picked from commit 2e80c7e5bf822e3b9efd145d33badcf4f14504ff)
* mesa: use gl_renderbuffer::Map for all depth/stencil accessesBrian Paul2012-01-272-10/+14
| | | | | | Instead of using the obsolete gl_renderbuffer::Data field. Color buffer are still accessed through GetRow/PutRow(). (cherry picked from commit 7d1ddec92168e9b6ead0da80b18364a75f9a85e6)
* intel: make intel_renderbuffer_map/unmap() staticBrian Paul2012-01-272-6/+3
| | | | (cherry picked from commit 14da67d9b9b9e30740ef1687c3952a0b5e8b0a54)
* swrast: s/Data/Map/ in swrast_texture_imageBrian Paul2012-01-275-21/+21
| | | | | To indicate that it points to mapped texture memory. (cherry picked from commit bd3c10c0f0c60ab3421c2da2eab814edc2296cb0)
* meta: Detect currently-unsupported integer CopyTexSubImage and complain.Eric Anholt2012-01-271-0/+5
| | | | | | | | | | | | | | | | | This code is unprepared for handling integer (particularly, the baseFormat of the TexFormat comes out as GL_RGBA, not GL_RGBA_INTEGER, so the direct call of Driver.ReadPixels crashes due to the int vs non-int error checking not having happened). I'm frankly tempted to convert this code to MapRenderbuffer/MapTexImage rather than doing it as meta ops, now that we have that support. Improves the remaining crash in Intel oglconform for int-textures to just a rendering failure. NOTE: This is a candidate for the 8.0 branch. Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit 6bf0f6ae86dae14ed0348e5fccf75c43302ad502)
* i965/gen6+: Work around GPU hangs with logic ops on integer textures.Eric Anholt2012-01-271-2/+7
| | | | | | | | | This doesn't result in correct rendering -- GL requires that logic ops work, while the hardware specs say it doesn't do them. I'm not sure how we would want to handle this. NOTE: This is a candidate for the 8.0 branch. (cherry picked from commit f6e82cd2a18b0edebe3e4102fc93b552e708935a)
* i965/gen6+: Disable blending, alpha test, and dither on integer FBOs.Eric Anholt2012-01-271-6/+23
| | | | | | | | Fixes GPU hangs and some rendering failures in piglit EXT_texture_integer/fbo-blending NOTE: This is a candidate for the 8.0 branch. (cherry picked from commit 04b4880d7c9a5882100ca6a19d42a8c012b174f6)
* i965: Fix border color on Sandybridge and Ivybridge.Kenneth Graunke2012-01-241-1/+7
| | | | | | | | | | | | | | | | | | | | | While reading through the simulator, I found some interesting code that looks like it checks the sampler default color pointer against the bound set in STATE_BASE_ADDRESS. On failure, it appears to program it to the base address itself. So I decided to try programming a legitimate bound, and lo and behold, border color worked. +92 piglits on Sandybridge. Also fixes Lightsmark on Ivybridge. NOTE: This is a candidate for stable release branches. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28924 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38868 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Yuanhan Liu <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit c25e5300cba7628b58df93ead14ebc3cc32f338c)
* mesa: Set default access flags based on the run-time APIIan Romanick2012-01-243-3/+3
| | | | | | | | | | | | | | | | | | | | The default access flags for OpenGL ES (via GL_OES_map_buffer) and desktop OpenGL are different. The code previously tried to handle this, but the decision was made at compile time. Since the same driver binary can be used for both OpenGL ES and desktop OpenGL, the decision must be made at run-time. This should fix bug #44433. It appears that the test case does various map and unmap operations and inspects the state of the buffer object around each. When it sees that GL_BUFFER_ACCESS does not match its expectations, it fails. NOTE: This is a candidate for release branches. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44433 (cherry picked from commit f0ea46790f8f4df9a39b0cfab5c5f1bf02c136fc)
* i965: Fix disassembly of data port writes on Ivybridge.Kenneth Graunke2012-01-241-1/+12
| | | | | | | | | | | msg_type moved by a bit, so the message type was being disassembled incorrectly. In particular, render target writes were showing up as "OWORD block write". NOTE: This is a candidate for stable release branches. Signed-off-by: Kenneth Graunke <[email protected]> (cherry picked from commit dcdfd1905c8012fe0a90e553f2a894c12cf144cf)
* i965: Fix disassembly of sampler messages on Ivybridge.Kenneth Graunke2012-01-241-1/+7
| | | | | | | | | | Compared to sampler_gen5, simd_mode shifted by a bit and msg_type grew by a bit. So we were printing slightly incorrect numbers. NOTE: This is a candidate for stable release branches. Signed-off-by: Kenneth Graunke <[email protected]> (cherry picked from commit a608be5d3333244f5357c459135b17b4c2298e18)
* i965/vs: Take attributes into account when deciding urb_entry_size.Kenneth Graunke2012-01-242-5/+8
| | | | | | | | | | | | | | | | | | | | | Both the VF and VS share space in the URB. First, the VF stores attributes (shader inputs) there. The VS then reads the attributes, executes, and reuses the space to store varyings (shader outputs). Thus, we need to calculate the amount of URB space necessary for inputs, outputs, and pick whichever is greater. The old VS backend correctly did this (brw_vs_emit.c:408), but the new VS backend only considered outputs. Fixes vertex scrambling in GLBenchmark PRO on Ivybridge. NOTE: This is a candidate for the 8.0 branch. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41318 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit 2e712e41db0c0676e9f30fc73172c0e8de8d84d4)
* intel: Set depth to 6 for cubemapsIan Romanick2012-01-242-5/+5
| | | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41216 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43212 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43250 Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: Jin Yang <[email protected]> (cherry picked from commit 8a472427559ea33186c71dfbab8254651fec3077)
* i965: Add support for Z16 depth formats.Eric Anholt2012-01-242-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a squash of the following two commits. The first caused a regression on SNB systems without a HiZ capable DDX, and the second fixes that regression. i965: Add support for Z16 depth formats. v2: Don't flag the format as being HiZ ready (there's DRI2 handshake pain to go through). Fixes piglit gl-3.0-required-sized-texture-formats NOTE: This is a candidate for the 8.0 branch. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]> (cherry picked from commit 2f868f1ddd636bc8d4cbcd5beeef1246cec80c65) intel/gen6: Some framebuffers having separate depthstencil should be unsupported When the framebuffer has separate depth and stencil buffers, and HiZ is not enabled on the depth buffer, mark the framebuffer as unsupported. This happens when trying to create a framebuffer with Z16/S8 because we haven't enabled HiZ on Z16 yet. Fixes gles2conform test stencil8. Note: This is a candiate for the 8.0 branch. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44948 Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed--by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]> (cherry picked from commit ba5252e590782a77b8a46d9c0ec4691cf8da6298)
* i965/gen7: Set up surface horizontal alignment field.Eric Anholt2012-01-241-1/+4
| | | | | | | | | | | | | This is required for Z16 support for texturing, which is the first thing to have a horizontal alignment of 8. Renderbuffers don't need it, since they're always set up as the only mip level, but do it for completeness anyway. NOTE: This is a candidate for the 8.0 branch. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]> (cherry picked from commit f0d5c92a4c9d5057d727819e501d80c5dfcdf76e)
* i965/gen7: Remove stale comment.Eric Anholt2012-01-241-1/+0
| | | | | | | | | | This field is actually set up above. NOTE: This is a candidate for the 8.0 branch, to avoid conflicts. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]> (cherry picked from commit fc767ff59056a418a1c573261f0d04a329278ee8)
* i965: Fix leak of the program cache BO on context destroy.Eric Anholt2012-01-241-0/+2
| | | | | NOTE: This is a candidate for the 8.0 branch. (cherry picked from commit cbd464a117317f276b65cbca69d6339166581bf7)
* i965/vs: Fix leak of an empty hash_table structure per compile.Eric Anholt2012-01-241-4/+0
| | | | | | | | This statement got duplicated above, probably in a rebase resolution, so we never freed the extra one. NOTE: This is a candidate for the 8.0 branch. (cherry picked from commit 7f278e15ad271daaa08dd2fef84cca5e344d5771)
* i965: Fix refcount leak of the gl_program structure.Eric Anholt2012-01-241-0/+2
| | | | | | | | Fixes a leak of almost 200kb on a minimal shader_runner program (algebraic-add-add-1). NOTE: This is a candidate for the 8.0 branch. (cherry picked from commit b2be4869624443cd9769bd696b11dd587494b62a)
* mesa: Make the register allocator allocation take a ralloc context.Eric Anholt2012-01-242-2/+2
| | | | | | | This fixes a memory leak on i965 context destruction. NOTE: This is a candidate for the 8.0 branch. (cherry picked from commit b972744c78e45928876ea781b9eeef09b3baf083)
* i965: Bump Ivybridge's fake MRF range to g112-127 instead of g111-126.Kenneth Graunke2012-01-241-1/+9
| | | | | | | | | | | | | | | | | | | | | | When I originally implemented the hack to use GRFs 111+ as fake MRFs, I did so purely to avoid rewriting all the code that dealt with MRFs. However, it turns out that a similar hack is actually required. Newly discovered language in the BSpec indicates that SEND instructions with EOT set "should" use g112-g127 as their source registers. Based on assertions in the simulator, this is actually a requirement on certain platforms. Since we're faking MRFs already, we may as well use the officially sanctioned range. My guess is that we avoided this issue because we seldom use m0: URB writes in the new VS backend start at m1, and RT writes in the new FS backend start at m2. NOTE: This is a candidate for stable release branches. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit 5acc7f38d42859db459567d4442c18764a4072e7)
* intel: Return if pointer to intel_context is nullAnuj Phogat2012-01-241-7/+7
| | | | | | | | It is better to test if(intel == NULL) and simply return in that case. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Chad Versace <[email protected]> (cherry picked from commit ce1c949b162260cec84431913f7aac83cb1b938e)
* intel: Fix warnings of undefined ffs().Eric Anholt2012-01-241-0/+1
| | | | | | | | | For some reason these started showing up with the automake conversion. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]> (cherry picked from commit ccf0d31a210baf062dcc0e0c19527cdbbade0ac9)
* i965: Comment gen6_hiz_get_framebuffer_enum()Chad Versace2012-01-241-4/+6
| | | | | | | | Make the comments precise. Explain why each branch is needed and correct. Document the potential pitfall in the true-branch. Signed-off-by: Chad Versace <[email protected]> (cherry picked from commit e13c99a0043854cb286c773faa891a3115cd0a68)
* i965: Remove the INTEL_OLD_VS option.Kenneth Graunke2012-01-193-10/+3
| | | | | | | | | | | | | | | | Now that we no longer generate Mesa IR from GLSL IR, it's impossible to use the old vertex shader backend for GLSL programs. There's simply no Mesa IR to codegen from. Any attempt to do so would result in immediate GPU hangs, presumably due to the driver uploading an empty program with no EOT message. NOTE: This is a candidate for the 8.0 branch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Eugeni Dodonov <[email protected]> (cherry picked from commit bdedd03b701781c8b71e162f7eb834e6a11105de)
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