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path: root/src/mesa/drivers
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* mesa: fold _glapi_check_multithread() back into _mesa_make_currentEmil Velikov2018-10-033-13/+0
* i965: Replace checks for rb->Name with FlipY (v2)Fritz Koenig2018-10-022-13/+11
* intel/isl: Add a unit suffixes to some struct fields and variablesJason Ekstrand2018-09-269-63/+63
* intel/compiler: Export TCS passthrough creationCaio Marcelo de Oliveira Filho2018-09-251-82/+1
* i965/icl: Set Enabled Texel Offset Precision Fix bitAnuj Phogat2018-09-212-0/+11
* i965: remove outdated comment about TCS passthroughCaio Marcelo de Oliveira Filho2018-09-201-4/+0
* mesa: move legacy dri config option texture_depthTimothy Arceri2018-09-181-0/+13
* mesa: move legacy dri config option fthrottle_modeTimothy Arceri2018-09-181-0/+12
* mesa: move legacy dri config option def_max_anisotropyTimothy Arceri2018-09-181-0/+5
* mesa: move legacy dri config option no_neg_lod_biasTimothy Arceri2018-09-181-0/+5
* mesa: move legacy dri config option round_modeTimothy Arceri2018-09-181-0/+10
* mesa: move legacy dri config option dither_modeTimothy Arceri2018-09-181-0/+12
* mesa: move legacy dri config option color_reductionTimothy Arceri2018-09-181-0/+10
* mesa: move legacy TCL dri config optionsTimothy Arceri2018-09-182-0/+15
* radeon: fix ColorMaskChristopher Egert2018-09-102-8/+8
* i965: Bump aperture tracking to u64Chris Wilson2018-09-103-11/+8
* Replace uses of _mesa_bitcount with util_bitcountDylan Baker2018-09-078-20/+27
* i965: Workaround the gen9 hw astc5x5 sampler bugJason Ekstrand2018-09-076-12/+131
* intel: compiler option msse2 and mstackrealignSergii Romantsov2018-09-072-4/+4
* compiler: Move double_inputs to gl_program::DualSlotInputsJason Ekstrand2018-09-062-10/+12
* i965: move brw_nir_lower_gl_images callAlejandro Piñeiro2018-09-052-1/+10
* intel/compiler: rename brw_nir_lower_glsl_imagesAlejandro Piñeiro2018-09-052-3/+3
* intel/compiler: remove unused variable num_imagesAlejandro Piñeiro2018-09-051-2/+0
* i965/gen7_urb: Re-emit PUSH_CONSTANT_ALLOC on some gen9Nanley Chery2018-08-311-0/+28
* i965/screen: Allow modifiers on sRGB formatsJason Ekstrand2018-08-301-3/+11
* intel/compiler: Remove surface_idx from brw_image_paramJason Ekstrand2018-08-292-12/+3
* anv,i965: Lower away image derefs in the driverJason Ekstrand2018-08-292-0/+131
* glsl/link,i965: Make ImageAccess four-stateJason Ekstrand2018-08-291-6/+6
* intel/compiler: Do image load/store lowering to NIRJason Ekstrand2018-08-291-0/+2
* i965: enable AMD_depth_clamp_separateSagar Ghuge2018-08-281-0/+1
* i965: add functional changes for AMD_depth_clamp_separateSagar Ghuge2018-08-281-5/+15
* mesa: Add support for AMD_depth_clamp_separateSagar Ghuge2018-08-281-4/+7
* i965: Add INTEL_fragment_shader_ordering support.Kevin Rogovin2018-08-281-0/+1
* i965/gen6/xfb: handle case where transform feedback is not activeAndrii Simiklit2018-08-281-1/+1
* Revert "configure: allow building with python3"Emil Velikov2018-08-241-1/+1
* Revert recent changes about not including compute in combined limits.Kenneth Graunke2018-08-241-11/+11
* i965: don't include compute resources in "Combined" limitsKenneth Graunke2018-08-231-11/+11
* configure: allow building with python3Emil Velikov2018-08-231-1/+1
* meson: Run the install script with Python 3Mathieu Bridon2018-08-231-0/+1
* i965: Enable INTEL_shader_atomic_float_minmax on Gen9+Ian Romanick2018-08-221-0/+1
* i965: Sort Gen9+ extension enablesIan Romanick2018-08-221-3/+3
* i965/miptree: Fix can_blit_slice()Nanley Chery2018-08-221-4/+3
* i965/miptree: Use miptree_map in map_blit functionsNanley Chery2018-08-221-8/+6
* i965/icl: Allow headerless sampler messages for pre-emptable contextsAnuj Phogat2018-08-212-0/+15
* i965: Implement EGL_KHR_mutable_render_bufferChad Versace2018-08-213-4/+107
* mesa: move legacy hyperz option from dri configTimothy Arceri2018-08-211-0/+5
* mesa: drop legacy no_rast dri optionTimothy Arceri2018-08-216-11/+3
* i965: remove unused no_rast boolTimothy Arceri2018-08-211-1/+0
* i915: remove early_z dri optionTimothy Arceri2018-08-214-16/+0
* i965: Advertise 8 bits subpixel precision for viewport bounds on gen6+Danylo Piliaiev2018-08-201-1/+1
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