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* i965: setup sized internalformat for MESA_FORMAT_R10G10B10A2_UNORMTapani Pälli2019-10-281-1/+9
* intel/perf: move registers to their own headerLionel Landwerlin2019-10-232-1/+2
* mesa: Redefine the RG formats as array formats.Eric Anholt2019-10-203-10/+10
* mesa: Replace MESA_FORMAT_L8A8/A8L8 UNORM/SNORM/SRGB with an array format.Eric Anholt2019-10-2010-27/+18
* mesa: Replace the LA16_UNORM packed formats with one array format.Eric Anholt2019-10-202-2/+5
* radeon: Drop the unused first arg of OUT_BATCH_RELOC.Eric Anholt2019-10-209-24/+24
* radeon: Fill in the TXOFFSET field containing the tile bits in our relocs.Eric Anholt2019-10-202-4/+5
* r100/r200: factor out txformat/txfilter setup from the TFP path.Eric Anholt2019-10-202-22/+10
* Revert "egl: Fixes transparency with EGL and X11."Hal Gentz2019-10-181-2/+0
* nir: support feeding state to nir_lower_clip_[vg]sErik Faye-Lund2019-10-171-1/+2
* nir: support lowering clipdist to arraysErik Faye-Lund2019-10-171-1/+1
* egl: Fixes transparency with EGL and X11.Hal Gentz2019-10-111-0/+2
* GL: drop symbols mangling supportEric Engestrom2019-10-102-8/+0
* nir: add a strip parameter to nir_serializeMarek Olšák2019-10-101-1/+1
* i965: Disable fast clears when running with INTEL_DEBUG=nofcCaio Marcelo de Oliveira Filho2019-10-092-0/+6
* meta: leak of shader program when decompressing tex-imagesSergii Romantsov2019-10-091-0/+1
* i965: Enable EXT_demote_to_helper_invocationCaio Marcelo de Oliveira Filho2019-09-301-0/+2
* intel: Increase Gen11 compute shader scratch IDs to 64.Kenneth Graunke2019-09-231-1/+13
* Revert "intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM"Kenneth Graunke2019-09-232-9/+0
* Move blob from compiler/ to util/Jason Ekstrand2019-09-191-1/+1
* i965: support AYUV/XYUV for external import onlyHaihao Xiang2019-09-181-0/+2
* scons: Make scons and meson agree about path to glapi generated headersDylan Baker2019-09-163-1/+3
* driconfig: add a new engine name/version parameterLionel Landwerlin2019-09-156-8/+9
* dri: Use DRM_FORMAT_* instead of defining our own copy.Eric Anholt2019-09-112-46/+47
* intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WMAnuj Phogat2019-09-112-0/+9
* glsl/nir: Add and use a gl_nir_link() functionCaio Marcelo de Oliveira Filho2019-09-101-8/+4
* glsl/nir: Fill in the Parameters in NIR linkerCaio Marcelo de Oliveira Filho2019-09-101-1/+1
* mesa: Eliminate gl_config::rgbModeAdam Jackson2019-09-092-16/+3
* mesa: Eliminate gl_config::have{Accum,Depth,Stencil}BufferAdam Jackson2019-09-095-20/+12
* mesa: Remove unused gl_config::indexBitsAdam Jackson2019-09-091-1/+0
* intel: Stop redirecting state cache to command streamer cache sectionKenneth Graunke2019-09-061-5/+0
* intel/dri: finish proper glthreadSergii Romantsov2019-09-051-1/+1
* i965: initialize bo_reuse when creating brw_bufmgrTapani Pälli2019-08-294-26/+15
* i965: Exit with error if gen12+ is detectedJordan Justen2019-08-281-0/+5
* glx: Fix incompatible function pointer types.Jose Fonseca2019-08-281-1/+1
* intel/fs: Drop the gl_program from fs_visitorJason Ekstrand2019-08-252-2/+2
* i965: Silence brw_blorp uninitialized warningCaio Marcelo de Oliveira Filho2019-08-231-1/+1
* glx: Sync <GL/glxext.h> with KhronosAdam Jackson2019-08-223-9/+8
* i965: honor scanout requirement from DRILionel Landwerlin2019-08-211-1/+3
* i965: Add handling for fp16 configsKevin Strasser2019-08-211-1/+24
* dri: Add fp16 formatsKevin Strasser2019-08-212-0/+22
* dri: Handle configs with floating point pixel dataKevin Strasser2019-08-211-0/+5
* dri: Add config attributes for color channel shiftKevin Strasser2019-08-211-19/+49
* i965: Add helper function for allowed config formatsKevin Strasser2019-08-211-31/+34
* nir: Add explicit signs to image min/max intrinsicsJason Ekstrand2019-08-211-2/+4
* i965: Enable OpenGL 4.6 for Gen8+Alejandro Piñeiro2019-08-212-2/+2
* i965: enable ARB_gl_spirv extension and ARB_spirv_extensions for gen7+Alejandro Piñeiro2019-08-211-0/+3
* i965/gen11: fix genX_bits.h include pathMauro Rossi2019-08-131-1/+1
* i965/gen11: Emit SLICE_HASH_TABLE when pipes are unbalanced.Rafael Antognolli2019-08-122-0/+88
* intel/compiler: Fill a compiler statistics structJason Ekstrand2019-08-126-6/+7
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