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* i965: always enable EXT_float_blendIlia Mirkin2019-02-181-0/+1
* i965: scale factor changes should trigger recompileLionel Landwerlin2019-02-182-1/+16
* i965: Assert the execobject handles match for this deviceChris Wilson2019-02-161-0/+2
* i965: Removed the field etc_format from the struct intel_mipmap_treeEleni Maria Stea2019-02-153-18/+1
* i965: Enabled the OES_copy_image extension on Gen 7 GPUsEleni Maria Stea2019-02-151-4/+12
* i965: Fixed the CopyImageSubData for ETC2 on Gen < 8Eleni Maria Stea2019-02-153-18/+6
* i965: Faking the ETC2 compression on Gen < 8 GPUs using two miptrees.Eleni Maria Stea2019-02-153-69/+134
* i965: Rename intel_mipmap_tree::r8stencil_* -> ::shadow_*Nanley Chery2019-02-153-19/+19
* drirc/i965: add option to disable 565 configs and visualsTapani Pälli2019-02-151-0/+13
* drm-uapi: use local files, not system libdrmEric Engestrom2019-02-1417-20/+20
* i965: add P0x formats and propagate required scaling factorsTapani Pälli2019-02-123-0/+17
* intel/compiler: add scale_factors to sampler_prog_key_dataTapani Pälli2019-02-121-0/+1
* i965: Use info->textures_used instead of prog->SamplersUsed.Kenneth Graunke2019-02-112-7/+7
* i965: Drop unnecessary 'and' with prog->SamplerUnitsKenneth Graunke2019-02-111-1/+1
* nir: Gather texture bitmasks in gl_nir_lower_samplers_as_deref.Kenneth Graunke2019-02-111-0/+2
* i965: Call nir_lower_samplers for ARB programs.Kenneth Graunke2019-02-111-0/+2
* i965: consider a 'base level' when calculating width0, height0, depth0Andrii Simiklit2019-02-071-1/+25
* i965: skip bit6 swizzle detection in Gen8+Caio Marcelo de Oliveira Filho2019-02-041-0/+14
* i965: Set flag for EXT_texture_compression_s3tc_srgbGurchetan Singh2019-02-011-0/+1
* android,autotools,i965: Fix location of float64_glsl.hDylan Baker2019-01-312-1/+3
* intel/defines: Explicitly cast to uint32_t in SET_FIELD and SET_BITSJason Ekstrand2019-01-291-1/+1
* i965: Set flag for EXT_sRGBGert Wollny2019-01-281-0/+1
* i965: Always compile fp64 funcs when neededMatt Turner2019-01-261-1/+2
* i965: Drop mark_surface_used mechanism.Kenneth Graunke2019-01-133-5/+7
* blorp: Pass the batch to lookup/upload_shader instead of contextKenneth Graunke2019-01-101-4/+4
* blorp: Add blorp_get_surface_address to the driver interface.Kenneth Graunke2019-01-101-0/+8
* i965: Compile fp64 funcs only if we do not have 64-bit hardware supportMatt Turner2019-01-101-1/+1
* intel/isl: move tiled_memcpy static libs from i965 to islTapani Pälli2019-01-1014-1459/+91
* i965: Enable 64-bit GLSL extensionsMatt Turner2019-01-091-4/+4
* i965: Compile fp64 software routines and lower double-opsMatt Turner2019-01-093-1/+63
* glsl: Create file to contain software fp64 functionsMatt Turner2019-01-091-0/+1
* radeon: fix printf format specifier.Maya Rashish2019-01-091-1/+1
* spirv: Sort supported capabilitiesJason Ekstrand2019-01-071-5/+5
* i965: add CS stall on VF invalidation workaroundLionel Landwerlin2019-01-042-2/+2
* i965: include draw_params/derived_draw_params for VF cache workaroundLionel Landwerlin2019-01-041-5/+18
* i965: limit VF caching workaround to gen8/9/10Lionel Landwerlin2019-01-042-2/+4
* i965: Don't override subslice count to 4 on Gen11.Kenneth Graunke2018-12-171-1/+1
* i965/gen9: Add workarounds for object preemption.Rafael Antognolli2018-12-141-0/+63
* i965/gen10+: Enable object level preemption.Rafael Antognolli2018-12-144-1/+36
* genxml: Consistently use a numeric "MOCS" fieldKenneth Graunke2018-12-141-7/+7
* i965/compute: Emit GPGPU_WALKER in genX_state_uploadJordan Justen2018-12-123-130/+105
* i965/genX_state: Add register access functionsJordan Justen2018-12-121-0/+31
* i965: Flip arguments to load_register_reg helpers.Kenneth Graunke2018-12-095-9/+10
* i965: Delete dead brw_meta_resolve_color prototype.Kenneth Graunke2018-12-091-7/+0
* intel/blorp: Expand blorp_address::offset to be 64 bits.Kenneth Graunke2018-12-073-3/+3
* mesa: Add core support for EXT_multisampled_render_to_texture{,2}Kristian H. Kristensen2018-12-061-1/+1
* mesa: Revert INTEL_fragment_shader_ordering supportMatt Turner2018-12-031-1/+0
* i965: Fix -Wswitch on INTEL_COPY_STREAMING_LOADChad Versace2018-12-031-1/+3
* i965: Set the FBO error state INCOMPLETE_ATTACHMENT only for SRGB_R8Gert Wollny2018-11-281-3/+10
* i965: Explicitely handle swizzles for MESA_FORMAT_R_SRGB8Gert Wollny2018-11-281-3/+7
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