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* i965: Use the upload BO for push constants on Gen7.5-Gen8.Kenneth Graunke2017-05-202-2/+2
| | | | | | | | | | | | | | | | | | | | We can easily use the upload BO for push constants on Gen7.5/Gen8 too, at the cost of a relocation when emitting 3DSTATE_CONSTANT_XS. We can simply switch to using constant buffer pointer 2 instead of pointer 0, like we do on Gen9+. Ivybridge and Baytrail can't do this trick because they require the constant buffers to be enabled in order, starting with 0. We'd have to set the INSTPM bit to make the constant buffer pointer not relative to dynamic state base address, which would need kernel command parser support. Improves performance in GLBenchmark 2.7/TRex Offscreen by: - Broadwell GT2: 0.305608% +/- 0.19877% (n = 68) - Braswell: No difference proven (n = 742) - Haswell GT3e: 0.180755% +/- 0.0237505% (n = 30) Reviewed-by: Chris Forbes <[email protected]>
* i965: Use the upload BO for push constants on Gen9+.Kenneth Graunke2017-05-202-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | Shaders can use quite a bit of uniform data. Better to put it in the upload buffers, like we do for client vertex data, rather than the batch buffer state area, which is primarly used for indirect state. This should free up batch space, allowing us to emit more commands in a batch before flushing. Because BRW_NEW_BATCH also causes a lot of state to be re-emitted, it may also reduce CPU overhead a little bit. We took this approach on Gen4-5, but switched to using the batch area on Gen6+ because buffer 0 is relative to Dynamic State Base Address by default, which is set to the start of the batch. On Gen9+, we already use a relocation due to a workaround, so this is trivial to change and has basically no downside. Unfortunately we can't change compute shader push constants because MEDIA_CURBE_LOAD always uses an offset from dynamic state base address. Improves performance in GLBenchmark 2.7/TRex Offscreen by: - Skylake GT4e: 0.52821% +/- 0.113402% (n = 190) - Apollolake: 0.510225% +/- 0.273064% (n = 70) Reviewed-by: Chris Forbes <[email protected]>
* i965: Drop BRW_NEW_PUSH_CONSTANT_ALLOCATION from CS packets.Kenneth Graunke2017-05-202-3/+1
| | | | | | | | | | | I don't think CS push constant uploading uses the section of L3 controlled by 3DSTATE_PUSH_CONSTANT_ALLOC_XS. So I don't think it needs to be re-emitted when that space is reallocated. The programming note in gen7_allocate_push_constants doesn't indicate this is necessary, at least. Reviewed-by: Chris Forbes <[email protected]>
* i965/formats: Update the three-channel DXT1 mappingsNanley Chery2017-05-182-14/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The procedure for decompressing an opaque DXT1 OpenGL format is dependant on the comparison of two colors stored in the first 32 bits of the compressed block. Here's the specified OpenGL behavior for reference: The RGB color for a texel at location (x,y) in the block is given by: RGB0, if color0 > color1 and code(x,y) == 0 RGB1, if color0 > color1 and code(x,y) == 1 (2*RGB0+RGB1)/3, if color0 > color1 and code(x,y) == 2 (RGB0+2*RGB1)/3, if color0 > color1 and code(x,y) == 3 RGB0, if color0 <= color1 and code(x,y) == 0 RGB1, if color0 <= color1 and code(x,y) == 1 (RGB0+RGB1)/2, if color0 <= color1 and code(x,y) == 2 BLACK, if color0 <= color1 and code(x,y) == 3 The sampling operation performed on an opaque DXT1 Intel format essentially hard-codes the comparison result of the two colors as color0 > color1. This means that the behavior is incompatible with OpenGL. This is stated in the SKL PRM, Vol 5: Memory Views: Opaque Textures (DXT1_RGB) Texture format DXT1_RGB is identical to DXT1, with the exception that the One-bit Alpha encoding is removed. Color 0 and Color 1 are not compared, and the resulting texel color is derived strictly from the Opaque Color Encoding. The alpha channel defaults to 1.0. Programming Note Context: Opaque Textures (DXT1_RGB) The behavior of this format is not compliant with the OGL spec. The opaque and non-opaque DXT1 OpenGL formats are specified to be decoded in exactly the same way except the BLACK value must have a transparent alpha channel in the latter. Use the four-channel BC1 Intel formats with the alpha set to 1 to provide the behavior required by the spec. Note that the alpha is already set to 1 for RGB formats in brw_get_texture_swizzle(). v2: Provide a more detailed commit message (Kenneth Graunke). v3: Ensure the alpha channel is set to 1 for DXT1 formats. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100925 Cc: <[email protected]> Acked-by: Tapani Pälli <[email protected]> (v1) Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Nanley Chery <[email protected]>
* Android: correct libz dependencyChih-Wei Huang2017-05-171-1/+2
| | | | | | | | | | | | | | | | | | | Commit 6facb0c0 ("android: fix libz dynamic library dependencies") unconditionally adds libz as a dependency to all shared libraries. That is unnecessary. Commit 85a9b1b5 introduced libz as a dependency to libmesa_util. So only the shared libraries that use libmesa_util need libz. Fix Android Lollipop build by adding the include path of zlib to libmesa_util explicitly instead of getting the path implicitly from zlib since it doesn't export the include path in Lollipop. Fixes: 6facb0c0 "android: fix libz dynamic library dependencies" Signed-off-by: Chih-Wei Huang <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Rob Herring <[email protected]>
* mesa: create validate_buffer_sub_data() helperTimothy Arceri2017-05-172-10/+5
| | | | | | | This change assumes meta will always pass valid arguments to _mesa_buffer_sub_data(). Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: Mark shader programs for capture in the error state.Matt Turner2017-05-156-1/+26
| | | | | | | | | | | | | When the GPU hangs, the kernel saves some state for us. Until now it has not included the shader programs, which are very often the reason the GPU hang occurred. With the programs saved in the error state, we should be more capable of debugging hangs. Thanks to Chris Wilson and Ben Widawsky who provided the kernel support for this feature ("drm/i915: Copy user requested buffers into the error state"), which will be in kernel v4.13. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: perf: fix pointer to integer castLionel Landwerlin2017-05-151-1/+1
| | | | | | | | v2: Just use cast to uintptr_t (Chris) Reported-by: Mauro Rossi <[email protected]> Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* i965: Port 3DSTATE_VF_TOPOLOGY on gen8+ to genxml.Rafael Antognolli2017-05-114-56/+21
| | | | | | | With this last state ported, we can get rid of gen8_draw_upload.c. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Port 3DSTATE_INDEX_BUFFER to genxml.Rafael Antognolli2017-05-115-74/+40
| | | | | | | | Also make the brw_get_index_type() function not shift its return, since that is genxml's job now. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Port brw_cs_state tracked state to genxml.Rafael Antognolli2017-05-113-164/+145
| | | | | | | Emit the respective commands using genxml code. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965/genxml: Mostly style fixes for emit_vertices code.Rafael Antognolli2017-05-111-25/+17
| | | | | | | | | | | | | | Several issues were caught on review after the original patch landed. This commit fixes them. v2: - Fix padding (Topi) - Remove .DestinationElementOffset change from this patch (Topi) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Drop brw_context::viewport_transform_enable.Kenneth Graunke2017-05-113-3/+1
| | | | | | | | | | This was used by the meta fast clear code. Now that we've switched back to BLORP, it's always true. We might want it back when we add a RECTLIST extension to GL, but that's someday in the future... Reviewed-by: Kristian H. Kristensen <[email protected]>
* i965: Port Gen4-5 VS_STATE to genxml.Kenneth Graunke2017-05-115-235/+68
| | | | | | It's actually not that much code. Reviewed-by: Rafael Antognolli <[email protected]>
* i965: Change GEN_GEN < 7 to GEN_GEN == 6 in 3DSTATE_VS code.Kenneth Graunke2017-05-111-5/+4
| | | | | | | | This whole code is surrounded in #if GEN_GEN >= 6, and this code only applies on Sandybridge. So, use GEN_GEN == 6 to reduce the delta in the next patch, when we add Gen4-5 support. Reviewed-by: Rafael Antognolli <[email protected]>
* Android: remove needless conditional including of child makefilesRob Herring2017-05-111-10/+1
| | | | | | | | | | It is not necessary to filter driver and winsys directories based on the list of enabled drivers. Selecting the included driver libraries or not is sufficient to control what is built. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Chih-Wei Huang <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: remove _CurrentFragmentProgram from gl_pipeline_objectTimothy Arceri2017-05-111-1/+1
| | | | | | | | | | | | | This was added in b527dd65c830a as a work around because fixed function fragment shaders were tracked in ctx->FragmentProgram._Current as a gl_program rather than gl_shader_program. However after my refactoring of the program and shader structs at the end of 2016 which culminated in c505d6d85222, we no longer need gl_shader_program to track the current program making _CurrentFragmentProgram obsolete. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: pass rb attachment to _mesa_framebuffer_texture()Timothy Arceri2017-05-111-2/+6
| | | | | | This change will help us add KHR_no_error support to the caller. Reviewed-by: Eric Anholt <[email protected]>
* i965: Make INTEL_DEBUG=bat decode VS/CLIP/GS/SF/WM/CC_STATE on Gen4-5.Kenneth Graunke2017-05-101-1/+21
| | | | | | | | | | | | | | This is something the original decoder did, but I didn't bother with until now. I recently had to debug an Ironlake issue, and wanted to inspect VS_STATE. So, now it's back. The other packets in the switch statement are all Gen6/7+, where we use offsets from dynamic state base address, so we don't need the gtt_offset subtraction introduced here. We might want to make a helper for this hack at some point - perhaps when we introduce the next occurance. Acked-by: Jason Ekstrand <[email protected]>
* i965: Switch BRW_NEW_CURBE_OFFSETS to BRW_NEW_PUSH_CONSTANT_ALLOCATION.Kenneth Graunke2017-05-108-18/+14
| | | | | | | | | | | | The BRW_NEW_CURBE_OFFSETS dirty bit is signalled when changing the partitioning of the Constant Buffer URB section between the various shader stages, on Gen4-5. BRW_NEW_PUSH_CONSTANT_ALLOCATION is basically the same thing on Gen7+. So, save a bit, and use the new name. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Drop BRW_NEW_PUSH_CONSTANT_ALLOCATION from Gen6 code.Kenneth Graunke2017-05-101-9/+3
| | | | | | | Gen6 doesn't have a configurable push constant region. This is only used on Gen7+. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Only #if...#endif a single function or related section at a time.Kenneth Graunke2017-05-101-3/+38
| | | | | | | | | | | Previously we guarded large swathes of code with #if GEN ... #endif blocks. This made it difficult to see which generations include what. This patch splits up the #if..#endif sections so they surround a small section of code - usually a single function/atom, or sometimes a group of related functions. It should make the code easier to work on. Reviewed-by: Rafael Antognolli <[email protected]>
* i965: Turn brw_get_line_width_float() into brw_get_line_width().Kenneth Graunke2017-05-102-12/+4
| | | | | | | | | | Drop the old brw_get_line_width() helper which return the unsigned fixed-point encoding of the line width - it's been dead since the conversion to GENXML (which does the encoding for us). Then rename brw_get_line_width_float() to the shorter name. Reviewed-by: Rafael Antognolli <[email protected]>
* i965: Drop INTEL_DEBUG=stats.Kenneth Graunke2017-05-106-15/+2
| | | | | | | | | | | | | | | | For whatever reason, we had an INTEL_DEBUG=stats option that enabled various statistics counters on Gen4-5 systems. It's been around forever, though I can't think of a single time that it's been useful. On Gen6+, we enable statistics all the time because they're necessary to support various query object targets. Turning them off would break those queries. Gen4-5 don't support those queries, so the statistics counters generally aren't useful; we disabled them by default. This patch disables them altogether. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* i965: Disable ARB_pipeline_statistics_query on Gen4-5.Kenneth Graunke2017-05-101-1/+1
| | | | | | | | | | | | | | | | | | | We apparently enabled this on all platforms in Mesa 10.6. However, it was only ever implemented for Gen6+. The Gen4-5 query code goes up in flames with an "Unrecognized query target" unreachable() error if you even attempt to use any of the new functionality. This wasn't caught because the Piglit tests require OpenGL 3.0, which Gen4-5 cannot support. The extension spec does say 3.0 is required, though I'm not sure why - it seems like 2.1 would work fine. We could implement it anyway, but it's a little bit of a pain due to the lack of hardware contexts (so we have to snapshot around batches). Given that it's been 100% broken for two years and I haven't seen a bug report about it, I'm not terribly inclined to care. So, let it go. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* intel/compiler/vs: Move inputs_read handling to generic codeJason Ekstrand2017-05-091-2/+0
| | | | | Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Set VERT_BIT_EDGEFLAG based on the VUE mapJason Ekstrand2017-05-091-4/+0
| | | | | | | We also add a nice little comment to make it more clear exactly what happens with the edge flag copy. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Embed the shader_info in the nir_shader againJason Ekstrand2017-05-097-31/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e1af20f18a86f52a9640faf2d4ff8a71b0a4fa9b changed the shader_info from being embedded into being just a pointer. The idea was that sharing the shader_info between NIR and GLSL would be easier if it were a pointer pointing to the same shader_info struct. This, however, has caused a few problems: 1) There are many things which generate NIR without GLSL. This means we have to support both NIR shaders which come from GLSL and ones that don't and need to have an info elsewhere. 2) The solution to (1) raises all sorts of ownership issues which have to be resolved with ralloc_parent checks. 3) Ever since 00620782c92100d77c660f9783504c6d80fa1d58, we've been using nir_gather_info to fill out the final shader_info. Thanks to cloning and the above ownership issues, the nir_shader::info may not point back to the gl_shader anymore and so we have to do a copy of the shader_info from NIR back to GLSL anyway. All of these issues go away if we just embed the shader_info in the nir_shader. There's a little downside of having to copy it back after calling nir_gather_info but, as explained above, we have to do that anyway. Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* android: i965: add per-gen libmesa_i965_gen{4,45,5} staticMauro Rossi2017-05-091-0/+66
| | | | | | | | | | | | | Needed to fix android building errors: external/mesa/src/mesa/drivers/dri/i965/brw_state_upload.c:148: error: undefined reference to 'gen5_init_atoms' external/mesa/src/mesa/drivers/dri/i965/brw_state_upload.c:150: error: undefined reference to 'gen45_init_atoms' external/mesa/src/mesa/drivers/dri/i965/brw_state_upload.c:152: error: undefined reference to 'gen4_init_atoms' clang++: error: linker command failed with exit code 1 (use -v to see invocation) Fixes: 5a19d0b ("i965: Get real per-gen atom lists") Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* i965: Update gen6_depth_stencil_state to use genX macro.Rafael Antognolli2017-05-071-1/+1
| | | | | | | | | While moving depth stencil state to use genxml, this one was left behind. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move MOCS macros to brw_state.h.Rafael Antognolli2017-05-072-42/+42
| | | | | | | | brw_state.h is a better place to keep them, instead of brw_context.h. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: Don't try to unmap NULL program cache BO.Kenneth Graunke2017-05-071-4/+7
| | | | | | | | | | | | | | | | When running shader-db with intel_stub and recent Mesa, context creation fails when making a logical hardware context. In this case, we call intelDestroyContext(), which gets here and tries to unmap the cache BO. But there isn't one - we haven't made it yet. So we try to unmap a NULL pointer, which used to be safe (it did nothing), but crashes after commit 7c3b8ed87859bfdfb985d21685115a729f9cd138. The result is that we crash rather than failing context creation with a nice message. Either way nothing works, but this is more polite. Cc: "17.1" <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Drop BRW_NEW_BLORP from 3DSTATE_VF atom.Kenneth Graunke2017-05-061-2/+1
| | | | | | | | BLORP doesn't program 3DSTATE_VF, since it doesn't use index buffers, making the setting irrelevant. So there's no need to re-emit it after a BLORP operation - the old setting will still be in place. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Port 3DSTATE_VF to genxml and simplify the implementation.Kenneth Graunke2017-05-063-43/+29
| | | | | | | | | | | | | The whole "it might be used for non-indexed draws" thing is no longer true - it turns out this was a mistake, and removed in OpenGL 4.5. (See Marek's commit 96cbc1ca29e0b1f4f4d6c868b8449999aecb9080.) So we can simplify this and just program 0 for non-indexed draws. We can also use #if blocks to remove the atom on Ivybridge/Baytrail, now that they have a separate atom list from Haswell. No more runtime checks. Reviewed-by: Topi Pohjolainen <[email protected]>
* i915: Fix build break with empty unreachable()Daniel Stone2017-05-051-4/+2
| | | | | | | | Actually put something in unreachable(), so as not to break the build on a Friday evening. Signed-off-by: Daniel Stone <[email protected]> Reported-by: Mark Janes <[email protected]>
* i965: Set modifier for imported and duplicated imagesDaniel Stone2017-05-051-0/+20
| | | | | | | | | | | | | | | | | When a buffer is being created from FD or GEM flink import, the current API makes no provision for passing modifier information along with this. Set the modifier for such images to DRM_FORMAT_MOD_INVALID. Also preserve the modifier when duplicating an image, as will be done by GBM when importing from a wl_buffer. This doubly tripped up Wayland, as the images would first have been created (as wl_buffers) with a 0 modifier, and then lost what modifier they would've had when being duplicated into gbm_bos. Fixes: d78a36ea624 ("i965/dri: Handle the linear fb modifier") Signed-off-by: Daniel Stone <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: Use helper function for modifier -> tilingDaniel Stone2017-05-051-17/+34
| | | | | | | | Use a helper function and struct to convert between a modifier and tiling mode, so we can use it later for a tiling -> modifier lookup. Signed-off-by: Daniel Stone <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: Fix line width on Cherryview.Kenneth Graunke2017-05-041-0/+7
| | | | | | | | We just add another field to gen8.xml for the Cherryview line width, rather than trying to replicate the gymnastics done in the Vulkan driver to use gen9 SF pack functions. Reviewed-by: Jason Ekstrand <[email protected]>
* drivers/x11: remove unneeded GLX_SHARED_GLAPI defineEmil Velikov2017-05-041-2/+0
| | | | | | | There's no users in-tree that use it. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/dri: remove unneeded HAVE_SHARED_GLAPI guardEmil Velikov2017-05-041-5/+1
| | | | | | | | | | | Always true, since the dri modules required shared glapi. With earlier commit (da410e6afad "configure: explicitly require shared glapi for enable-dri") we even made that explicit during the configure stage. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/dri: always link against shared glapiEmil Velikov2017-05-041-7/+9
| | | | | | | | | Analogous to previous commit. Check with the extensive commit description and bug report referenced. Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: Port gen4+ state emitting code to genxml.Rafael Antognolli2017-05-035-230/+174
| | | | | | | | | | | | | | | | On this patch, we port: - brw_polygon_stipple - brw_polygon_stipple_offset - brw_line_stipple - brw_drawing_rect v2: - Also emit states for gen4-5 with this code. v3: - Style fixes and remove excessive checks (Ken). Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ 3DSTATE_CC_STATE_POINTERS state to genxml.Rafael Antognolli2017-05-034-95/+50
| | | | | Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ multisample state emitting code to genxml.Rafael Antognolli2017-05-035-136/+96
| | | | | | | | | | | Emit 3DSTATE_MULTISAMPLE using brw_batch_emit. v3: - Remove dead code (Ken) - Simplify #if/#endif (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen4+ emit vertices code to genxml.Rafael Antognolli2017-05-034-792/+556
| | | | | | | | | | | | | | | | | | | Some code that was placed in brw_draw_upload.c and exported to be used by gen8+ was also moved to genX_state_upload, and the respective symbols are not exported anymore. v2: - Remove code from brw_draw_upload too - Emit vertices for gen4-5 too. - Use helper to setup brw_address (Kristian) - Use macros for MOCS values. - Do not use #ifndef NDEBUG on code that is actually used (Ken) v3: - Style and code clenup (Ken) - Keep some of the common code inside brw_draw_upload.c (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port push constant code to genxml.Rafael Antognolli2017-05-039-385/+226
| | | | | | | | | | | | | | | | | | | The following states are ported on this patch: - gen6_gs_push_constants - gen6_vs_push_constants - gen6_wm_push_constants - gen7_tes_push_constants v2: - Use helper to setup brw_address (Kristian) v3: - Do not use macro for upload_constant_state (Ken) - Do not re-declare MOCS macro (Ken) v4: (by Ken) - Drop more dead code, change brw->gen checks to GEN_GEN, style nits Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ 3DSTATE_SCISSOR_STATE_POINTERS to use genxml.Rafael Antognolli2017-05-034-116/+87
| | | | | | | | | | | | Emit 3DSTATE_SCISSOR_STATE_POINTERS using brw_batch_emit, and pack the scissor states using GENX(SCISSOR_RECT_pack), generated from genxml. v3: - Remove old code (Ken) - Style fixes (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen7+ 3DSTATE_TE to genxml.Rafael Antognolli2017-05-034-71/+39
| | | | | | | Emit 3DSTATE_TE on Gen7+ using brw_batch_emit helper. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ blend state code to genxml.Rafael Antognolli2017-05-035-522/+312
| | | | | | | | | | | | | | Upload blend states using GENX(BLEND_STATE_ENTRY_pack), generated from genxml. v3: - style fixes (Ken) - cleanup to remove excessive #ifdef's (Ken) - remove memset (Ken) - disable blend.AlphaToCoverageDitherEnable on gen6 (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ state emitting code to genxml.Rafael Antognolli2017-05-0313-1180/+471
| | | | | | | | | | | | | | | Ported in this patch: - 3DSTATE_DS - 3DSTATE_GS - 3DSTATE_HS - 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL v3: - Remove NEW_TRANSFORM blocks (Ken) - Bring back some comments and workaround for Ivybridge (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
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