summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers
Commit message (Collapse)AuthorAgeFilesLines
* i965: Refer people to brw_tex_layout.c rather than the BSpec.Kenneth Graunke2013-07-151-2/+2
| | | | | | | brw_tex_layout.c sets up the align_w/h fields, and has all the appropriate spec references already. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Remove old BSpec reference from BLORP's 3DSTATE_WM/PS packets.Kenneth Graunke2013-07-152-5/+5
| | | | | | | | | | | | The Sandybridge code had a citation for the range of the "Maximum Number of Threads" field, and the Ivybridge code just mentioned the "BSpec" in general. That's documented in the obvious place, so people can find it without a spec reference. The real value of the comment is to say "we tried zero, and it exploded, so program it to a valid number even if pixel shading is off." Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Cite the Ivybridge PRM for 3DSTATE_URB_* programming.Kenneth Graunke2013-07-151-2/+3
| | | | Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Update workaround flush comments for Gen6 3DSTATE_VS.Kenneth Graunke2013-07-152-2/+6
| | | | | | | | | | Unfortunately, the workaround text never made it into the Sandybridge PRM, so we still have to refer to the BSpec. It also wasn't obvious why we needed this workaround at all, since we don't currently do VS passthrough - but BLORP can turn off the VS. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Cite the Ivybridge PRM for VS PIPE_CONTROL workarounds.Kenneth Graunke2013-07-151-2/+2
| | | | Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Cite the Sandybridge PRM for Gen7 stencil pitch requirements.Kenneth Graunke2013-07-151-9/+5
| | | | | | | | Sadly, the Ivybridge PRM can't be cited, as it is missing the relevant text for some reason. However, the Sandybridge PRM has the text Chad originally quoted, and the modern BSpec has the same text. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Cite the Ivybridge PRM for multisample surface format notes.Kenneth Graunke2013-07-151-13/+9
| | | | Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Delete "the data cache is the sampler cache" comments on Gen7+.Kenneth Graunke2013-07-151-12/+0
| | | | | | | | | | | | | | | | I cut and pasted these comments from the Gen4 code during Ivybridge enabling, and didn't understand what they meant at the time. The data cache is NOT the same as the sampler cache on Ivybridge. The sampler cache has L1 and L2 caches in addition to the L3 cache, while data port messages to the "data cache" hit L3 directly. This means that the sampler domain is technically wrong, but we stopped caring about read/write domains quite a while ago. The kernel just flushes all the caches at the end of each batchbuffer, and our render to texture code flushes the sampler caches when necessary. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Cite the 965 PRM for "the data cache is the sampler cache".Kenneth Graunke2013-07-151-3/+3
| | | | | | | | | | | | Presumably, this comment exists to justify the usage of I915_GEM_DOMAIN_SAMPLER for this relocation. At one point, this was necessary to ensure that the right flushing was done to keep caches coherent. These days, the kernel just flushes everything, so I don't think it matters. Still, the comment is interesting, so leave it in place. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Cite the Ivybridge PRM for DP message descriptor fields.Kenneth Graunke2013-07-151-3/+3
| | | | Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Cite the Ivybridge PRM for why the fake MRF range is what it is.Kenneth Graunke2013-07-151-1/+1
| | | | | | The exact text is in the public docs, so we should cite those. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Cite the Ivybridge PRM for SFID enum values.Kenneth Graunke2013-07-151-2/+1
| | | | | | | | | | | The Ivybridge PRM adds new SFIDs and lists them in a different volume than Sandybridge, so it's worth adding a reference. I also removed the BSpec reference, as the section it referred to was moved somewhere, and I couldn't find it. This leaves one Haswell SFID without a citation, but we can add one once the PRMs are out. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Gen4/5: use IEEE floating point mode for GLSL shaders.Chris Forbes2013-07-142-2/+17
| | | | | | | Fixes isinf(), isnan() from GLSL 1.30 Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vs: Gen4/5: enable front colors if back colors are writtenChris Forbes2013-07-141-0/+6
| | | | | | | | | | | | | | | | | | | | | | Fixes undefined results if a back color is written, but the corresponding front color is not, and only backfacing primitives are drawn. Results are still undefined if a frontfacing primitive is drawn, but that's OK. The other reasonable way to fix this would have been to just pick the one color slot that was populated, but that dilutes the value of the tests. On Gen6+, the fixed function clipper and triangle setup already take care of this. Fixes 11 piglits: spec/glsl-1.10/execution/interpolation/interpolation-none-gl_Back*Color-* NOTE: This is a candidate for stable branches. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Fix clear rectangle alignment in fast color clearAnuj Phogat2013-07-101-4/+19
| | | | | | | | | | | | From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel Backend > MCS Buffer for Render Target(s) [DevIVB+]: [DevHSW:GT3]: Clear rectangle must be aligned to two times the number of pixels in the table shown below... Observed no piglit, gles3conform regressions with this patch. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65744
* i965: Delete intel_context entirely.Kenneth Graunke2013-07-0974-237/+136
| | | | | | | | | | This makes brw_context inherit directly from gl_context; that was the only thing left in intel_context. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-0967-622/+483
| | | | | | | | | | Most functions no longer use intel_context, so this patch additionally removes the local "intel" variables to avoid compiler warnings. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::has_llc to brw_context.Kenneth Graunke2013-07-096-9/+7
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::is_<platform> flags to brw_context.Kenneth Graunke2013-07-0929-64/+61
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move must_use/has_separate_stencil fields to brw_context.Kenneth Graunke2013-07-096-13/+11
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::has_hiz to brw_context.Kenneth Graunke2013-07-094-5/+4
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Free brw, not intel.Kenneth Graunke2013-07-091-1/+1
| | | | | | | | | | | | | Things worked out in the past because both brw and intel share the same memory address (by virtue of intel being the first member of brw). However, brw is what actually gets rzalloc'd (brw_context.c:285), so freeing that seems safer and more obvious. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Shorten context base class dereference chains.Kenneth Graunke2013-07-0912-31/+28
| | | | | | | | | ctx->DrawBuffer is much more sensible than brw->intel.ctx.DrawBuffer. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::has_swizzling to brw_context.Kenneth Graunke2013-07-095-11/+7
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::intelScreen to brw_context.Kenneth Graunke2013-07-099-30/+24
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Delete unused intel_context::driFd field.Kenneth Graunke2013-07-092-3/+0
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Store brw_context as the DRI driver private, not intel_context.Kenneth Graunke2013-07-091-1/+1
| | | | | | | | | | Right now, they're interchangeable. In the future, intel_context will either go away or change purpose. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::driContext to brw_context.Kenneth Graunke2013-07-094-9/+7
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::NewGLState to brw_context.Kenneth Graunke2013-07-094-6/+5
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::upload to brw_context.Kenneth Graunke2013-07-093-66/+61
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::max_gtt_map_object_size to brw_context.Kenneth Graunke2013-07-094-5/+5
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::perf_debug to brw_context.Kenneth Graunke2013-07-0923-39/+20
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::no_batch_wrap to brw_context.Kenneth Graunke2013-07-094-6/+4
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context's framerate throttling fields to brw_context.Kenneth Graunke2013-07-095-15/+17
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::stats_wm to brw_context.Kenneth Graunke2013-07-096-8/+7
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::batch to brw_context.Kenneth Graunke2013-07-0933-206/+170
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::hw_ctx to brw_context.Kenneth Graunke2013-07-097-13/+11
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::bufmgr to brw_context.Kenneth Graunke2013-07-0914-38/+29
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context's driconf flags to brw_context.Kenneth Graunke2013-07-095-18/+21
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::reduced_primitive to brw_context.Kenneth Graunke2013-07-096-8/+8
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move front buffer rendering fields from intel_context to brw.Kenneth Graunke2013-07-098-53/+52
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::vtbl to brw_context.Kenneth Graunke2013-07-099-85/+79
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::optionCache to brw_context.Kenneth Graunke2013-07-095-17/+17
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Pass brw_context to functions rather than intel_context.Kenneth Graunke2013-07-0977-777/+782
| | | | | | | | | | | | | | This makes brw_context available in every function that used intel_context. This makes it possible to start migrating fields from intel_context to brw_context. Surprisingly, this actually removes some code, as functions that use OUT_BATCH don't need to declare "intel"; they just use "brw." Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Remove pointless intel_context parameter from try_copy_propagate.Kenneth Graunke2013-07-092-5/+3
| | | | | | | | | It's already part of the visitor class. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Add forward declarations of brw_context to a few places.Kenneth Graunke2013-07-092-0/+2
| | | | | | | | | | | These files have forward declarations for intel_context. This makes brw_context available in the same places without further #include monkeying. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Replace #include "intel_context.h" with brw_context.h.Kenneth Graunke2013-07-0929-29/+23
| | | | | | | | | | | brw_context.h includes intel_context.h, but additionally makes the brw_context structure available. Switching this allows us to start using brw_context in more places. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move ctx->Const setup from intelInitContext to the new helper.Kenneth Graunke2013-07-092-25/+21
| | | | | | | | | | This also requires moving _mesa_init_point() to after the ctx->Const initialization. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Split code to set ctx->Const values into a helper function.Kenneth Graunke2013-07-091-110/+120
| | | | | | | | | | | brwCreateContext() has a lot of random things to do. Factoring out the part that initializes ctx->Const values and shader compiler options makes the main function a bit easier to read. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i915: Remove i965+ chip names.Kenneth Graunke2013-07-091-1/+0
| | | | | | | | | i965+ chipsets shouldn't ever hit this driver. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>