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* xmlconfig: suppress libGL warnings when LIBGL_DEBUG == "quiet"Stefan Dirsch2014-09-091-1/+3
| | | | | | | | Let's handle LIBGL_DEBUG env. variable in Mesa in a consistent way. Fixes: https://bugzilla.novell.com/show_bug.cgi?id=895730 Signed-off-by: Stefan Dirsch <[email protected]> Reviewed-by: Courtney Goeltzenleuchter <[email protected]>
* i965: Handle ir_binop_ubo_load in boolean expression code.Kenneth Graunke2014-09-082-4/+4
| | | | | | | | | | | | | | | | | | | UBO loads can be boolean-valued expressions, too, so we need to handle them in emit_bool_to_cond_code() and emit_if_gen6(). However, unlike most expressions, it doesn't make sense to evaluate their operands, then do something with the results. We just want to evaluate the UBO load as a whole---which performs the read from memory---then load the boolean result into the flag register. Instead of adding code to handle it, we can simply bypass the ir_expression handling, and fall through to the default code, which will do exactly that. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83468 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Cc: [email protected]
* i965/fs: Make emit_if_gen6 never fall back to emit_bool_to_cond_code.Kenneth Graunke2014-09-081-8/+17
| | | | | | | | | | | | | | | | | Matt and I believe that Sandybridge actually uses 0xFFFFFFFF for a "true" comparison result, similar to Ivybridge. This matches the internal documentation, and empirical results, but contradicts the PRM. So, the comment is inaccurate, and we can actually just handle these directly without ever needing to fall through to the condition code path. Also, the vec4 backend has always done it this way, and has apparently been working fine. This patch makes the FS backend match the vec4 backend's behavior. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Handle ir_triop_csel in emit_if_gen6().Kenneth Graunke2014-09-082-4/+33
| | | | | | | | | | | | ir_triop_csel can return a boolean expression, so we need to handle it here; we simply forgot when we added ir_triop_csel, and forgot again when adding it to emit_bool_to_cond_code. Fixes Piglit's EXT_shader_integer_mix/{vs,fs}-mix-if-bool on Sandybridge. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Cc: [email protected]
* i965/fs: Remove direct fs_visitor gl_fragment_program dependenceJordan Justen2014-09-064-4/+8
| | | | | | | Instead we cast backend_visitor::prog for fragment shader specific code paths. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Remove direct fs_generator brw_wm_prog_key dependenceJordan Justen2014-09-052-2/+10
| | | | | | | | Instead we store a void pointer to the key, and cast it to brw_wm_prog_key for fragment shader specific code paths. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Remove direct fs_generator brw_wm_prog_data dependenceJordan Justen2014-09-052-15/+24
| | | | | | | | Instead we store a brw_stage_prog_data pointer, and cast it to brw_wm_prog_data for fragment shader specific code paths. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Don't store gl_fragment_program* in fs_generatorJordan Justen2014-09-052-7/+8
| | | | | | | gl_program* is named prog similar to backend_visitor. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add uses_kill to brw_wm_prog_dataJordan Justen2014-09-055-8/+10
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Rename fs_generator::prog to shader_progJordan Justen2014-09-052-7/+7
| | | | | | | This matches backend_visitor, and will allow gl_program to be named prog. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add stage variable to fs_generatorJordan Justen2014-09-052-3/+5
| | | | | | | This will allow for stage specific code paths. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Adjust fast-clear resolve rect for BDWKristian Høgsberg2014-09-051-4/+10
| | | | | | | | | | The scale factors for the resolve rectangle change for BDW and we have to look at brw->gen now to figure out how big it should be. Fixes: https://bugs.freedesktop.org/attachment.cgi?id=105777 Cc: "10.3" <[email protected]> Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Don't look at virtual_grf_sizes for uniformsJason Ekstrand2014-09-051-2/+1
| | | | | | | | | Uniform values are in the UNIFORM register file, not the GRF register file. Looking in virtual_grf_sizes makes no sense and only makes the output of dump_instructions confusing. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* meta: Store precompiled msaa shaders for all supported sample countsAnuj Phogat2014-09-052-22/+55
| | | | | | | | | | | | | | | | | | | | | | | | | Currently, BLIT_MSAA_SHADER_2D_MULTISAMPLE_RESOLVE* and BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_RESOLVE* shaders in setup_glsl_msaa_blit_shader() are not recompiled when the source buffer sample count changes. For example, implementation continued using a 4X msaa shader, even if source buffer changes from 4X msaa to 8x msaa. It causes incorrect rendering. This patch adds new enums in blit_msaa_shader, one for each supported sample count, and uses them to store msaa shaders. Fixes following piglit tests on Broadwell: ext_framebuffer_multisample-accuracy all_samples color ext_framebuffer_multisample-accuracy all_samples depth_draw ext_framebuffer_multisample-accuracy all_samples depth_resolve ext_framebuffer_multisample-accuracy all_samples stencil_draw ext_framebuffer_multisample-accuracy all_samples stencil_resolve ext_framebuffer_multisample-formats all_samples Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstarnd <[email protected]>
* i965/blorp: Pass image formats seperately from the miptreeJason Ekstrand2014-09-054-19/+43
| | | | | | | | | | | | | | | When a texture is wrapped in a texture view, we can't trust the format in the miptree itself. This patch allows us to pass the format seperately through blorp so we can proprerly handled wrapped textures. It's worth noting here that we can use the miptree format directly for depth/stencil formats because they cannot be reinterpreted by a texture view. Signed-off-by: Jason Ekstrand <[email protected]> CC: "10.3" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/fs: Brown bag fix.Matt Turner2014-09-051-1/+1
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* i965/vec4: Add ability to reswizzle arbitrary swizzles.Matt Turner2014-09-051-56/+18
| | | | | | | | | | | | | | | | Before commit 04895f5c we would only reswizzle dot product instructions (since they wrote the same value into all channels, and we didn't have to think about anything else). That commit extended reswizzling to cases when the swizzle was single valued -- i.e., writing the same result into all channels. But allowing reswizzling of arbitrary things is actually really easy and is even less code. (Why didn't we do this in the first place?!) total instructions in shared programs: 4266079 -> 4261000 (-0.12%) instructions in affected programs: 351933 -> 346854 (-1.44%) Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Reswizzle sources when necessary.Matt Turner2014-09-052-11/+25
| | | | | | | | | | Despite the comment above the function claiming otherwise, the function did not reswizzle sources, which would lead to bad code generation since commit 04895f5c, which began claiming we could do such swizzling when we could not. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82932 Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Clean up emitting of untyped atomic and surface readsJason Ekstrand2014-09-051-6/+4
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Fix basic block tracking in try_rep_send().Matt Turner2014-09-051-4/+9
| | | | | | | The 'start' instruction is always in the current block, except for the case of shader time, which emits code in a pattern seen no where else. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Pass block to insert and remove functions missed earlier.Matt Turner2014-09-051-7/+7
| | | | | | | | | | | | | | | Otherwise, the basic block start/end IPs don't get updated properly, leading to a broken CFG. This usually results in the following assertion failure: brw_fs_live_variables.cpp:141: void brw::fs_live_variables::setup_def_use(): Assertion `ip == block->start_ip' failed. Fixes KWin, WebGL demos, and a score of Piglit tests on Sandybridge and earlier hardware. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Mark cfg dumping functions const.Kenneth Graunke2014-09-052-4/+4
| | | | | | | | | | The dump() methods don't alter the CFG or basic blocks, so we should mark them as const. This lets you call them even if you have a const cfg_t - which is the case in certain portions of the code (such as live interval handling). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Update if_block/else_block in the dead control flow pass.Matt Turner2014-09-051-0/+7
| | | | | | I think this bug crept in only recently. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Connect cfg properly in predicated break peephole.Matt Turner2014-09-051-4/+9
| | | | | | | | If the ENDIF instruction was the only instruction in its block, we'd leave the successors of the merged if+jump block in a bad state. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83080 Reviewed-by: Kenneth Graunke <[email protected]>
* Revert 5 i965 patches: 8e27a4d2, 373143ed, c5bdf9be, 6f56e142, 88e3d404Jordan Justen2014-09-0434-185/+112
| | | | | | | | | | | | | | | | | | | | | | Reverts * "i965: Modify state upload to allow 2 different sets of state atoms." 8e27a4d2b3e4e74e9a77446bce49607433d86be3 * "i965: Modify dirty bit handling to support 2 pipelines." 373143ed9187c4d4ce1e3c486b5dd0880d18ec8b * "i965: Create a macro for checking a dirty bit." c5bdf9be1eca190417998d548fd140c1eca37a54 Conflicts: src/mesa/drivers/dri/i965/brw_context.h * "i965: Create a macro for setting all dirty bits." 6f56e1424d923fd80c84090fbf4506c9eaaffea1 Conflicts: src/mesa/drivers/dri/i965/brw_blorp.cpp src/mesa/drivers/dri/i965/brw_state_cache.c src/mesa/drivers/dri/i965/brw_state_upload.c * "i965: Create a macro for setting a dirty bit." 88e3d404dad009d8cff5124cf8acee7daeaceb64 Signed-off-by: Jordan Justen <[email protected]>
* i965/fs: Use prog rather than fp->Base in fs_visitorJordan Justen2014-09-042-15/+15
| | | | | | | Reduce fs_visitor's dependence on gl_fragment_program. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Use stage_prog_data instead of prog_data->base in fs_visitorJordan Justen2014-09-041-6/+6
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add init function to fs_visitorJordan Justen2014-09-042-0/+7
| | | | | | | | This common init routine can be used by constructors for multiple program types. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* osmesa: s/INLINE/inline/Brian Paul2014-09-041-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* xlib: s/INLINE/inline/Brian Paul2014-09-041-3/+3
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* meta: s/INLINE/inline/Brian Paul2014-09-041-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* Eliminate several cases of multiplication in arguments to callocCarl Worth2014-09-032-3/+3
| | | | | | | | | | | | | | | | | | | | | | In commit 32f2fd1c5d6088692551c80352b7d6fa35b0cd09, several calls to _mesa_calloc(x) were replaced with calls to calloc(1, x). This is strictly equivalent to what the code was doing previously. But for cases where "x" involves multiplication, now that we are explicitly using the two-argument calloc, we can do one step better and replace: calloc(1, A * B); with: calloc(A, B); The advantage of the latter is that calloc will detect any overflow that would have resulted from the multiplication and will fail the allocation, (whereas the former would return a small allocation). So this fix can change potentially exploitable buffer overruns into segmentation faults. Reviewed-by: Matt Turner <[email protected]>
* i965: Handle ir_triop_csel in emit_bool_to_cond_code().Kenneth Graunke2014-09-032-4/+36
| | | | | | | | | | | ir_triop_csel can return a boolean expression, so we need to handle it here; we simply forgot when we added it. Fixes Piglit's EXT_shader_integer_mix/{vs,fs}-mix-if-bool. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Cc: [email protected]
* i965: Move curb_read_length/total_scratch to brw_stage_prog_data.Kenneth Graunke2014-09-0316-38/+40
| | | | | | | | All shader stages have these fields, so it makes sense to store them in the common base structure, rather than duplicating them in each. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/copy_image: Divide the x offsets by block width when using the blitterJason Ekstrand2014-09-031-10/+21
| | | | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Cc: "10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804 Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/copy_image: Use the correct block dimensionJason Ekstrand2014-09-031-6/+6
| | | | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Cc: "10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804 Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* meta/copy_image: Use the correct texture level when creating viewsJason Ekstrand2014-09-031-1/+1
| | | | | | | | | | | | | | Previously, we were accidentally assuming that the level of both textures was 0. Now we actually use the correct level in our hacked texture view. This doesn't 100% fix the meta path because the texture type is getting lost somewhere in the pipeline. However, it actually copies to/from the correct layer now. Signed-off-by: Jason Ekstrand <[email protected]> Cc: "10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804 Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/copy_image: Use the correct texture levelJason Ekstrand2014-09-031-4/+6
| | | | | | | | | | | | Previously, we were using the source images level for both source and destination. Also, we weren't taking the MinLevel from a potential texture view into account. This commit fixes both problems. Signed-off-by: Jason Ekstrand <[email protected]> Cc: "10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804 Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* meta: Make MESA_META_DRAW_BUFFERS restore properlyKristian Høgsberg2014-09-021-34/+4
| | | | | | | | | | | | | | | | | | | | A meta begin/end pair with MESA_META_DRAW_BUFFERS will change visible GL state. We recreate the draw buffer enums from the buffer bitfield, which changes GL_BACK to GL_BACK_LEFT (and GL_FRONT to GL_FRONT_LEFT). This commit modifes the save/restore logic to instead copy the buffer enums from the gl_framebuffer and then set them on restore using _mesa_drawbuffers(). It's not clear how this breaks the benchmark in 82796, but fixing meta to not leak the state change fixes the regression. No piglit regressions. Reviewed-by: Kenneth Graunke <[email protected]> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=82796 Signed-off-by: Kristian Høgsberg <[email protected]> Cc: [email protected]
* mesa: Convert NewDriverState to 64-bitsJordan Justen2014-09-014-4/+16
| | | | | | | i965 will have more than 32 bits when BRW_STATE_COMPUTE_PROGRAM is added. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965: Modify state upload to allow 2 different sets of state atoms.Paul Berry2014-09-012-25/+32
| | | | | | | The set of state atoms for compute shaders is currently empty; it will be filled in by future patches. Reviewed-by: Jordan Justen <[email protected]>
* i965: Modify dirty bit handling to support 2 pipelines.Paul Berry2014-09-014-16/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The hardware state for compute shaders is almost entirely orthogonal to the hardware state for 3D rendering. To avoid sending unnecessary state to the hardware, we'll need to have a separate set of state atoms for the compute pipeline and the 3D pipeline. That means we need to maintain two separate sets of dirty bits to determine which state atoms need to be run. But the dirty bits are not completely independent; for example, if BRW_NEW_SURFACES is flagged while doing 3D rendering, then not only do we need to re-run 3D state atoms that depend on BRW_NEW_SURFACES, but we also need to re-run compute state atoms that depend on BRW_NEW_SURFACES. But we'll also need to re-run those state atoms the next time the compute pipeline is run. To accomplish this, we record two sets of dirty bits, one for each pipeline. When bits are dirtied (via SET_DIRTY_BIT() or SET_DIRTY_ALL()) we set them to the dirty state in both pipelines. When brw_state_upload() is run, we clear the dirty bits just for the pipeline that was run. Note that since the number of pipelines is known at compile time to be 2, the compiler should unroll the loops in SET_DIRTY_BIT() and SET_DIRTY_ALL(). Reviewed-by: Jordan Justen <[email protected]>
* i965: Create a macro for checking a dirty bit.Paul Berry2014-09-012-1/+7
| | | | | | | This will make it easier to extend dirty bit handling to support compute shaders. Reviewed-by: Jordan Justen <[email protected]>
* i965: Create a macro for setting all dirty bits.Paul Berry2014-09-014-7/+18
| | | | | | | This will make it easier to extend dirty bit handling to support compute shaders. Reviewed-by: Jordan Justen <[email protected]>
* i965: Create a macro for setting a dirty bit.Paul Berry2014-09-0132-67/+74
| | | | | | | This will make it easier to extend dirty bit handling to support compute shaders. Reviewed-by: Jordan Justen <[email protected]>
* i965: add missing parens in vec4 visitorDave Airlie2014-09-021-1/+2
| | | | | | | | | coverity reported this, Matt said it look like missing parens, not bad identing, so lets try that. Cc: "10.2 10.3" <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965/fs: Don't segfault when debug-logging a null programJason Ekstrand2014-09-011-2/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Don't segfault when debug-logging a null programJason Ekstrand2014-09-011-2/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: don't use ir->shadow_comparitor in emit_texture_*Connor Abbott2014-09-012-7/+5
| | | | | Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: don't pass ir_variable * to emit_samplepos_setup()Connor Abbott2014-09-013-5/+4
| | | | | | | | We were only using it to get at its type, which we already know because it's a builtin variable. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>