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* i965: Push UBO data, but don't use it just yet.Kenneth Graunke2017-07-132-7/+64
* i965: Pad buffer objects by 2kB in robust contexts to avoid OOB access.Kenneth Graunke2017-07-131-2/+20
* i965: Stop re-uploading push constants after URB reconfiguration.Kenneth Graunke2017-07-132-8/+7
* i965: Separate uploading push constant data from the pointer packets.Kenneth Graunke2017-07-133-34/+52
* i965: Introduce a BRW_NEW_DRAW_CALL dirty bit.Kenneth Graunke2017-07-133-0/+8
* i965: Store per-stage push constant BO pointers.Kenneth Graunke2017-07-133-3/+6
* i965: Select ranges of UBO data to be uploaded as push constants.Kenneth Graunke2017-07-135-0/+10
* i965: Require a UBO offset alignment of 32 bytes.Kenneth Graunke2017-07-131-1/+4
* i965: Switch to absolute addressing for constant buffer 0.Kenneth Graunke2017-07-133-0/+31
* i965: Use async maps for BufferSubData to regions with no valid data.Kenneth Graunke2017-07-131-1/+3
* i965: Track a range of the buffer which contains valid data.Kenneth Graunke2017-07-132-4/+48
* i965: Add a "write" parameter to intel_bufferobj_buffer.Kenneth Graunke2017-07-139-19/+26
* i965: Convert GS_STATE to genxml.Rafael Antognolli2017-07-135-172/+54
* i965: Prepare gs_state emitting code to include gen4-5.Rafael Antognolli2017-07-131-13/+11
* i965: Remove upload_gs_state_for_tf.Rafael Antognolli2017-07-134-60/+16
* i965: Convert BLEND_CONSTANT_COLOR state to genxml.Rafael Antognolli2017-07-133-64/+27
* i965: Convert CC state on gen4-5 to genxml.Rafael Antognolli2017-07-135-284/+68
* i965: Move color calc code around a bit.Rafael Antognolli2017-07-131-8/+8
* i965: Check for alpha channel just like in gen6+.Rafael Antognolli2017-07-131-1/+4
* i965: Make a helper function for blend entry related state.Rafael Antognolli2017-07-131-81/+101
* i965: Make a helper function for depth/stencil related state.Kenneth Graunke2017-07-131-48/+65
* i965: fix missing NULL return if allocation failsLionel Landwerlin2017-07-131-0/+1
* i965: check pointer before dereferencing itLionel Landwerlin2017-07-131-7/+7
* i965: map_gtt: check mapping address before adding offsetLionel Landwerlin2017-07-131-1/+3
* i965/urb: Trigger upload_urb on NEW_BLORPJason Ekstrand2017-07-132-3/+2
* i965/screen: Drop get_tiled_heightJason Ekstrand2017-07-121-17/+3
* i965/screen: Use ISL for doing image import checksJason Ekstrand2017-07-121-4/+28
* i965/screen: Use ISL for allocating image BOsJason Ekstrand2017-07-121-22/+29
* i965: Add an isl_device to intel_screenJason Ekstrand2017-07-123-1/+8
* i965/miptree: Move CCS allocation into create_for_dri_imageJason Ekstrand2017-07-121-13/+12
* i965: Use create_for_dri_image in intel_update_image_bufferJason Ekstrand2017-07-121-9/+14
* i965/miptree: Add support for window system images to create_for_dri_imageJason Ekstrand2017-07-124-6/+17
* i965/miptree: Add a colorspace parameter to create_for_dri_imageJason Ekstrand2017-07-124-5/+28
* i965/miptree: Allocate mt earlier in update winsysBen Widawsky2017-07-123-18/+37
* i965/miptree: Add a return for updating of winsysBen Widawsky2017-07-123-10/+14
* i965: Use miptree_create_for_dri_image in image_target_renderbuffer_storageJason Ekstrand2017-07-121-22/+1
* i965/miptree: Set level_x/h in create_for_dri_imageJason Ekstrand2017-07-121-0/+2
* i965/miptree: Add tile_x/y to total_width/heightJason Ekstrand2017-07-121-2/+2
* i965/miptree: Pass the offset into create_for_bo in create_for_dri_imageJason Ekstrand2017-07-121-3/+1
* i965: Move the DRIimage -> miptree code to intel_mipmap_tree.cJason Ekstrand2017-07-123-110/+112
* i965: Drop bogus pthread_mutex_unlock in map_gtt error path.Kenneth Graunke2017-07-121-1/+0
* intel: Move the DRM uapi headers to a non-Intel location.Eric Anholt2017-07-122-3/+3
* i965: Use VALGRIND_MAKE_MEM_x in place of MALLOCLIKE/FREELIKEChris Wilson2017-07-111-7/+27
* i965: Fix asynchronous mappings on !LLC platforms.Kenneth Graunke2017-07-111-2/+17
* i965: Don't use PREAD for glGetBufferSubData().Kenneth Graunke2017-07-113-28/+10
* i965: perf: use new subslices numbers from device infoLionel Landwerlin2017-07-111-32/+17
* i965: Use already existing eu_totalBen Widawsky2017-07-111-8/+1
* i965: Resolve framebuffers before signaling the fenceChris Wilson2017-07-111-0/+32
* i965: Assert that we don't use CPU write maps to non-coherent buffers.cros-mesa-17.1.1-r3-vanillachadv/cros-mesa-17.1.1-r3-vanillaKenneth Graunke2017-07-101-0/+6
* i965: Disable access to CPU mmap for async access on non-LLC machinesChris Wilson2017-07-101-4/+12
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