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* i965: Fix min_vs_entries for CHVVille Syrjälä2015-01-231-1/+1
* i965: Fix max_wm_threads for CHVVille Syrjälä2015-01-231-1/+1
* i965/emit: Assert that src1 is not an MRF after doing the MRF->GRF conversionJason Ekstrand2015-01-221-1/+1
* i965/emit: Do the sampler index adjustment directly in header.0.3Jason Ekstrand2015-01-224-7/+5
* meta: Move loop declaration to top of block.José Fonseca2015-01-221-2/+4
* i965/tex_subimage: use meta instead of the blitter for PBO TexSubImageJason Ekstrand2015-01-221-100/+15
* i965/tex_image: Use meta for instead of the blitter PBO TexImage and GetTexImageJason Ekstrand2015-01-221-179/+18
* i965/pixel_read: Use meta_pbo_GetTexSubImage for PBO ReadPixelsJason Ekstrand2015-01-221-118/+3
* meta: Add an implementation of GetTexSubImage for PBOsJason Ekstrand2015-01-222-0/+125
* meta: Add a BlitFramebuffers-based implementation of TexSubImageJason Ekstrand2015-01-222-0/+247
* i965: Implement SetTextureStorageForBufferObjectJason Ekstrand2015-01-221-0/+57
* i965: Apply the miptree offset to surface state for renderbuffersJason Ekstrand2015-01-224-4/+8
* i965/mipmap_tree: Add a depth parameter to create_for_boJason Ekstrand2015-01-226-7/+14
* i965/vec4: Fix fprintf argument ordering.Matt Turner2015-01-211-2/+2
* i965: Extract scalar region checking logicBen Widawsky2015-01-203-7/+15
* i965: Add QWORD sizes to type_sz macroBen Widawsky2015-01-201-0/+3
* i965: Work around mysterious Gen4 GPU hangs with minimal state changes.Kenneth Graunke2015-01-191-0/+13
* i965/nir: Enable SIMD16 support in the NIR FS backend.Kenneth Graunke2015-01-191-2/+1
* i965/nir: Use offset() instead of altering reg_offset directly.Kenneth Graunke2015-01-191-59/+32
* i965/nir: Replace fs_reg(GRF, virtual_grf_alloc(...)) with vgrf(...).Kenneth Graunke2015-01-193-13/+23
* i965: Replace fs_reg(fs_visitor, type) with fs_visitor::vgrf(type).Kenneth Graunke2015-01-196-128/+122
* i965/fs: Fix the dummy fragment shader.Kenneth Graunke2015-01-171-7/+32
* i965: Fix up too-wide commentKristian Høgsberg2015-01-161-4/+3
* i965: Fix some oddities in FB_WRITE register width and execution size.Kenneth Graunke2015-01-161-0/+2
* i965/fs: Make lower_load_payload etc. appear in INTEL_DEBUG=optimizer.Kenneth Graunke2015-01-161-7/+11
* i965/gen6: Fix crash with VS+TF after rendering with GSIago Toral Quiroga2015-01-161-1/+1
* util/hash_set: Rework the API to know about hashingJason Ekstrand2015-01-151-3/+4
* util: Move main/set to util/hash_setJason Ekstrand2015-01-151-1/+1
* i965: Don't consider null dst instructions as matching non-null dst.Matt Turner2015-01-152-2/+4
* i965/vec4: Make sure that imm writes are to registers in the same file.Matt Turner2015-01-151-2/+8
* i965/fs: Emit MADs from (x + abs(y * z)).Matt Turner2015-01-151-3/+15
* i965/fs: Emit MADs from (x + -(y * z)).Matt Turner2015-01-151-0/+12
* i965/nir: Do a final copy lowering pass before lowering locals to regsJason Ekstrand2015-01-151-0/+3
* nir: Rename lower_variables to lower_vars_to_ssaJason Ekstrand2015-01-151-1/+1
* nir/tex_instr: Add a nir_tex_src struct and dynamically allocate the src arrayJason Ekstrand2015-01-151-2/+2
* i965/fs_nir: Handle sample ID, position, and mask betterJason Ekstrand2015-01-152-12/+71
* nir: Make load_const SSA-onlyJason Ekstrand2015-01-152-26/+3
* i965/nir: Move the other lowering passes to before out-of-SSAJason Ekstrand2015-01-151-6/+6
* nir/lower_atomics: Use/support SSAJason Ekstrand2015-01-151-3/+3
* nir: Remove predicationJason Ekstrand2015-01-151-62/+11
* nir: Make bcsel a fully vector operationJason Ekstrand2015-01-151-3/+8
* i965/fs_nir: Add support for indirect texture arraysJason Ekstrand2015-01-151-4/+21
* nir/tex_instr: Rename the indirect source type and add an array sizeJason Ekstrand2015-01-151-1/+1
* nir: Use a source for uniform buffer indices instead of an indexJason Ekstrand2015-01-151-37/+59
* nir: Make texture instruction names more consistentJason Ekstrand2015-01-151-2/+2
* nir: Add a basic constant folding passJason Ekstrand2015-01-151-0/+2
* nir: Add an algebraic optimization passJason Ekstrand2015-01-151-1/+1
* nir: Add a lowering pass for adding source modifiers where possibleJason Ekstrand2015-01-151-0/+5
* i965/fs_nir: Implement the ARB_gpu_shader5 interpolation intrinsicsJason Ekstrand2015-01-151-0/+120
* i965/fs_nir: Add a has_indirect flag and clean up some of the input/output codeJason Ekstrand2015-01-151-63/+14
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