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* intel: Drop the speculatively-use-firstImage-mt in validation.Eric Anholt2011-01-101-17/+0
* intel: Don't relayout the texture on maxlevel change.Eric Anholt2011-01-101-7/+6
* intel: When making a new teximage miptree, make a full one.Eric Anholt2011-01-101-79/+68
* meta: Don't tweak BaseLevel when doing glGenerateMipmap().Eric Anholt2011-01-101-4/+1
* Revert "intel: Always allocate miptrees from level 0, not tObj->BaseLevel."Eric Anholt2011-01-1010-82/+152
* i965: Add #defines for HiZ and separate stencil buffer commands.Kenneth Graunke2011-01-101-0/+3
* i965: Add new HiZ related bits to WM_STATE.Kenneth Graunke2011-01-101-1/+8
* i965: Rename more #defines to 3DSTATE rather than CMD or CMD_3D.Kenneth Graunke2011-01-103-22/+22
* i965: Remove unused #defines which only contain the sub-opcode.Kenneth Graunke2011-01-101-22/+0
* r600: Include mfeatures.h in files that perform feature tests.Vinson Lee2011-01-092-0/+2
* r300: Include mfeatures.h in files that perform feature tests.Vinson Lee2011-01-092-0/+2
* r200: Include mfeatures.h in files that perform feature tests.Vinson Lee2011-01-092-0/+2
* radeon: Include mfeatures.h in files that perform feature tests.Vinson Lee2011-01-095-0/+5
* dri/nouveau: Include mfeatures.h in files that perform feature tests.Vinson Lee2011-01-092-0/+3
* intel: Include mfeatures.h in files that perform feature tests.Vinson Lee2011-01-096-0/+7
* intel: Make renderbuffer tiling choice match texture tiling choice.Eric Anholt2011-01-071-4/+9
* intel: Use the _BaseFormat from MESA_FORMAT_* in renderbuffer setup.Eric Anholt2011-01-071-36/+1
* i915: Drop old checks for the settexoffset hack.Eric Anholt2011-01-072-17/+6
* i915: Don't claim to support AL1616 when neither 830 nor 915 does it.Eric Anholt2011-01-071-1/+2
* intel: Add a vtbl hook for determining if a format is renderable.Eric Anholt2011-01-077-38/+68
* intel: expose ARB_framebuffer_object in the i915 driver.Eric Anholt2011-01-071-1/+1
* i965: Avoid double-negation of immediate values in the VS.Eric Anholt2011-01-071-4/+3
* r600c: fix up SQ setup in blit code for Ontario/NIAlex Deucher2011-01-071-1/+87
* r600c: add support for NI asicsAlex Deucher2011-01-065-1/+118
* i965: Rename various gen6 #defines to match the documentation.Kenneth Graunke2011-01-0612-33/+33
* mesa: fix build for NetBSDPierre Allegraud2011-01-061-3/+3
* i965: skip too small size mipmapZou Nan hai2011-01-061-2/+4
* i915: Fix build for previous commit.Eric Anholt2011-01-051-11/+11
* intel: Always allocate miptrees from level 0, not tObj->BaseLevel.Eric Anholt2011-01-059-141/+71
* intel: Drop unused first/lastlevel args to miptree_create_for_region.Eric Anholt2011-01-053-8/+3
* intel: Clarify first_level/last_level vs baselevel/maxlevel by deletion.Eric Anholt2011-01-057-56/+30
* i915: Enable LOD preclamping on 8xx like on 915/965.Eric Anholt2011-01-052-0/+3
* i915: Implement min/max lod clamping in hardware on 8xx.Eric Anholt2011-01-053-25/+32
* intel: Drop TEXTURE_RECTANGLE check in miptree layout setup.Eric Anholt2011-01-051-37/+24
* intel: Clean up redundant setup of firstLevel.Eric Anholt2011-01-051-5/+4
* intel: Drop a check for GL_TEXTURE_4D_SGIS.Eric Anholt2011-01-051-1/+0
* i965: Simplify the renderbuffer setup code.Eric Anholt2011-01-051-102/+93
* i965: use BLT to clear buffer if possible on SandybridgeXiang, Haihao2011-01-051-6/+0
* i965: Add support for SRGB DXT1 formats.Eric Anholt2011-01-043-2/+10
* intel: Merge our choosetexformat fallbacks into core.Eric Anholt2011-01-045-229/+60
* r300/compiler: disable the rename_regs pass for loopsMarek Olšák2011-01-041-0/+8
* r300/compiler: Fix black terrain in Civ4Tom Stellard2011-01-041-8/+1
* intel: When validating an FBO's combined depth/stencil, use the given FBO.Eric Anholt2011-01-041-4/+4
* intel: Fix segfaults from trying to use _ColorDrawBuffers in FBO validation.Eric Anholt2011-01-041-4/+16
* osmesa: pass context to _mesa_update_framebuffer_visual()Brian Paul2011-01-041-1/+1
* i965: Use last vertex convention for quad provoking vertex on sandybridgeZhenyu Wang2011-01-041-0/+7
* i965: Correct comment for gen6 fb write control message settingZhenyu Wang2011-01-041-1/+3
* i965: Fix provoking vertex select in clip state for sandybridgeZhenyu Wang2011-01-041-1/+4
* intel: Use tri clears when we don't know how to blit clear the format.Eric Anholt2011-01-033-7/+10
* intel: Handle forced swrast clears before other clear bits.Eric Anholt2011-01-031-22/+20