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* dri/nouveau: Initialize tile_flags when allocating a render target.Francisco Jerez2010-10-122-6/+14
* i965: Always use the new FS backend on gen6.Eric Anholt2010-10-111-2/+7
* i965: Fix gen6 pixel_[xy] setup to avoid mixing int and float src operands.Eric Anholt2010-10-111-6/+15
* i965: Don't compute-to-MRF in gen6 VS math.Eric Anholt2010-10-111-7/+15
* i965: Expand uniform args to gen6 math to full registers to get hstride == 1.Eric Anholt2010-10-111-0/+25
* i965: Don't compute-to-MRF in gen6 math instructions.Eric Anholt2010-10-111-0/+16
* i965: Add a couple of checks for gen6 math instruction limits.Eric Anholt2010-10-111-0/+26
* i965: Don't consider gen6 math instructions to write to MRFs.Eric Anholt2010-10-111-17/+38
* intel_extensions: Add ability to set GLSL version via environmentChad Versace2010-10-111-1/+18
* r200: revalidate after radeon_update_renderbuffersDaniel Vetter2010-10-113-3/+10
* i965: Compute to MRF in the new FS backend.Eric Anholt2010-10-112-0/+124
* i965: Give the FB write and texture opcodes the info on base MRF, like math.Eric Anholt2010-10-112-38/+48
* i965: Give the math opcodes information on base mrf/mrf len.Eric Anholt2010-10-112-12/+57
* i965: Move FS backend structures to a header.Eric Anholt2010-10-115-363/+407
* i965: Reduce register interference checks for changed FS_OPCODE_DISCARD.Eric Anholt2010-10-111-5/+2
* i965: Split FS_OPCODE_DISCARD into two steps.Eric Anholt2010-10-111-9/+23
* dri/nv10: Fake fast Z clears for pre-nv17 cards.Francisco Jerez2010-10-104-20/+127
* dri/nouveau: Minor cleanup.Francisco Jerez2010-10-104-23/+22
* i965: Initialize member variables.Vinson Lee2010-10-081-0/+2
* i965: Silence unused variable warning on non-debug builds.Vinson Lee2010-10-081-0/+1
* i965: Silence unused variable warning on non-debug builds.Vinson Lee2010-10-081-0/+1
* i915: Silence unused variable warning in non-debug builds.Vinson Lee2010-10-081-0/+1
* i915: Silence unused variable warning in non-debug builds.Vinson Lee2010-10-081-0/+1
* intel: Enable GL_ARB_explicit_attrib_locationIan Romanick2010-10-081-0/+1
* i965: Add register coalescing to the new FS backend.Eric Anholt2010-10-081-0/+80
* i965: Enable attribute swizzling (repositioning) in the gen6 SF.Eric Anholt2010-10-081-1/+2
* i965: Fix new FS gen6 interpolation for sparsely-populated arrays.Eric Anholt2010-10-081-1/+1
* i965: Fix gen6 WM push constants updates.Eric Anholt2010-10-081-1/+2
* i965: Handle swizzles in the addition of YUV texture constants.Eric Anholt2010-10-081-2/+5
* i965: Drop the check for YUV constants in the param list.Eric Anholt2010-10-081-13/+0
* i965: Drop the check for duplicate _mesa_add_state_reference.Eric Anholt2010-10-081-6/+0
* i965: Normalize cubemap coordinates like is done in the Mesa IR path.Eric Anholt2010-10-074-0/+114
* i965: Disable emitting if () statements on gen6 until we really fix them.Eric Anholt2010-10-072-0/+7
* gles2: Add GL_EXT_texture_format_BGRA8888 supportKristian Høgsberg2010-10-071-0/+1
* i965: Fix gen6 pointsize handling to match pre-gen6.Eric Anholt2010-10-061-1/+2
* i965: Don't assume that WPOS is always provided on gen6 in the new FS.Eric Anholt2010-10-061-2/+1
* i965: Add support for gl_FrontFacing on gen6.Eric Anholt2010-10-061-10/+39
* i965: Refactor gl_FrontFacing setup out of general variable setup.Eric Anholt2010-10-061-22/+31
* i965: Gen6's sampler messages are the same as Ironlake.Eric Anholt2010-10-061-1/+1
* i965: Don't do 1/w multiplication in new FS for gen6Eric Anholt2010-10-061-6/+8
* i965: Add some clarification of the WECtrl field.Eric Anholt2010-10-062-4/+21
* i965: Fix botch in the header_present case in the new FS.Eric Anholt2010-10-061-0/+1
* i965: Fix up IF/ELSE/ENDIF for gen6.Eric Anholt2010-10-063-24/+79
* i965: Gen6 no longer has the IFF instruction; always use IF.Eric Anholt2010-10-061-3/+5
* i965: Add back gen6 headerless FB writes to the new FS backend.Eric Anholt2010-10-061-11/+32
* i965: Also do constant propagation for the second operand of CMP.Eric Anholt2010-10-061-0/+5
* i965: Enable the constant propagation code.Eric Anholt2010-10-061-2/+0
* i965: Add support for gen6 FB writes to the new FS.Eric Anholt2010-10-042-3/+22
* i965: In disasm, gen6 fb writes don't put msg reg # in destreg_conditionalmod.Eric Anholt2010-10-041-1/+1
* i965: Add initial folding of constants into operand immediate slots.Eric Anholt2010-10-041-0/+90
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