index
:
mesa.git
gallium_va_encpackedheader01
master
Unnamed repository; edit this file 'description' to name the repository.
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
mesa
/
drivers
Commit message (
Expand
)
Author
Age
Files
Lines
*
i965: skip too small size mipmap
Zou Nan hai
2011-01-06
1
-2
/
+4
*
i915: Fix build for previous commit.
Eric Anholt
2011-01-05
1
-11
/
+11
*
intel: Always allocate miptrees from level 0, not tObj->BaseLevel.
Eric Anholt
2011-01-05
9
-141
/
+71
*
intel: Drop unused first/lastlevel args to miptree_create_for_region.
Eric Anholt
2011-01-05
3
-8
/
+3
*
intel: Clarify first_level/last_level vs baselevel/maxlevel by deletion.
Eric Anholt
2011-01-05
7
-56
/
+30
*
i915: Enable LOD preclamping on 8xx like on 915/965.
Eric Anholt
2011-01-05
2
-0
/
+3
*
i915: Implement min/max lod clamping in hardware on 8xx.
Eric Anholt
2011-01-05
3
-25
/
+32
*
intel: Drop TEXTURE_RECTANGLE check in miptree layout setup.
Eric Anholt
2011-01-05
1
-37
/
+24
*
intel: Clean up redundant setup of firstLevel.
Eric Anholt
2011-01-05
1
-5
/
+4
*
intel: Drop a check for GL_TEXTURE_4D_SGIS.
Eric Anholt
2011-01-05
1
-1
/
+0
*
i965: Simplify the renderbuffer setup code.
Eric Anholt
2011-01-05
1
-102
/
+93
*
i965: use BLT to clear buffer if possible on Sandybridge
Xiang, Haihao
2011-01-05
1
-6
/
+0
*
i965: Add support for SRGB DXT1 formats.
Eric Anholt
2011-01-04
3
-2
/
+10
*
intel: Merge our choosetexformat fallbacks into core.
Eric Anholt
2011-01-04
5
-229
/
+60
*
r300/compiler: disable the rename_regs pass for loops
Marek Olšák
2011-01-04
1
-0
/
+8
*
r300/compiler: Fix black terrain in Civ4
Tom Stellard
2011-01-04
1
-8
/
+1
*
intel: When validating an FBO's combined depth/stencil, use the given FBO.
Eric Anholt
2011-01-04
1
-4
/
+4
*
intel: Fix segfaults from trying to use _ColorDrawBuffers in FBO validation.
Eric Anholt
2011-01-04
1
-4
/
+16
*
osmesa: pass context to _mesa_update_framebuffer_visual()
Brian Paul
2011-01-04
1
-1
/
+1
*
i965: Use last vertex convention for quad provoking vertex on sandybridge
Zhenyu Wang
2011-01-04
1
-0
/
+7
*
i965: Correct comment for gen6 fb write control message setting
Zhenyu Wang
2011-01-04
1
-1
/
+3
*
i965: Fix provoking vertex select in clip state for sandybridge
Zhenyu Wang
2011-01-04
1
-1
/
+4
*
intel: Use tri clears when we don't know how to blit clear the format.
Eric Anholt
2011-01-03
3
-7
/
+10
*
intel: Handle forced swrast clears before other clear bits.
Eric Anholt
2011-01-03
1
-22
/
+20
*
radeon: fix build on non-KMS systems.
Dave Airlie
2011-01-03
1
-0
/
+3
*
i965: Do lowering of array indexing of a vector in the FS.
Eric Anholt
2010-12-28
1
-0
/
+1
*
i965: Fix regression in FS comparisons on original gen4 due to gen6 changes.
Eric Anholt
2010-12-28
2
-4
/
+32
*
i965: Factor out the ir comparision to BRW_CONDITIONAL_* code.
Eric Anholt
2010-12-28
1
-80
/
+34
*
i965: Fix occlusion query on sandybridge
Zhenyu Wang
2010-12-28
1
-0
/
+6
*
Revert "i965: upload multisample state for fragment program change"
Zhenyu Wang
2010-12-28
3
-38
/
+25
*
i965: Internally enable GL_NV_blend_square on ES2.
Kenneth Graunke
2010-12-27
1
-0
/
+1
*
i965: don't spawn GS thread for LINELOOP on Sandybridge
Xiang, Haihao
2010-12-27
1
-1
/
+4
*
i965: Flatten if-statements beyond depth 16 on pre-gen6.
Kenneth Graunke
2010-12-27
1
-0
/
+10
*
intel: Only do frame throttling at glFlush time when using frontbuffer.
Eric Anholt
2010-12-25
1
-1
/
+2
*
i965: use align1 access mode for instructions with execSize=1 in VS
Xiang, Haihao
2010-12-24
1
-0
/
+2
*
i965: fix register region description
Xiang, Haihao
2010-12-24
1
-1
/
+1
*
intel: Remove unnecessary headers.
Vinson Lee
2010-12-23
2
-2
/
+0
*
i965: Remove unnecessary headers.
Vinson Lee
2010-12-23
1
-2
/
+0
*
i965: Keep around a copy of the VS constant surface dumping code.
Eric Anholt
2010-12-23
1
-0
/
+9
*
i965: Correct the dp_read message descriptor setup on g4x.
Eric Anholt
2010-12-23
3
-1
/
+23
*
i965: upload multisample state for fragment program change
Zhenyu Wang
2010-12-23
3
-25
/
+38
*
i965: Use MI_FLUSH_DW for blt ring flush on sandybridge
Zhenyu Wang
2010-12-23
2
-2
/
+7
*
i965: explicit tell header present for fb write on sandybridge
Zhenyu Wang
2010-12-22
4
-8
/
+8
*
i965: Avoid using float type for raw moves, to work around SNB issue.
Eric Anholt
2010-12-21
2
-4
/
+8
*
intel: Check for unsupported texture when finishing using as a render target
Chris Wilson
2010-12-21
1
-1
/
+2
*
nouveau: fix includes for latest libdrm
Ben Skeggs
2010-12-21
1
-1
/
+1
*
r600c : inline vertex format is not updated in an app, switch to use vfetch c...
richard
2010-12-16
1
-1
/
+1
*
intel: Support glCopyTexImage() from XRGB8888 to ARGB8888.
Eric Anholt
2010-12-16
3
-2
/
+94
*
intel: Try to sanely check that formats match for CopyTexImage.
Eric Anholt
2010-12-16
1
-40
/
+20
*
intel: Drop commented intel_flush from copy_teximage.
Eric Anholt
2010-12-16
1
-1
/
+0
[next]