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path: root/src/mesa/drivers
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* i965: Move fs_visitor ra pass to new fs_visitor::allocate_registers()10.4-branchpointKristian Høgsberg2014-11-142-59/+69
* i965: Move fs_visitor optimization pass into new method fs_visitor::optimize()Kristian Høgsberg2014-11-142-65/+72
* i965: Move more code into codegen-branch of the fs_visitor::run() if statementKristian Høgsberg2014-11-141-12/+11
* i965: Refactor fs_generator APIKristian Høgsberg2014-11-144-39/+23
* st/dri: Support EGL_CONTEXT_OPENGL_DEBUG_BIT_KHR/GLX_CONTEXT_DEBUG_BIT_ARB on...José Fonseca2014-11-141-8/+6
* i965/vec4: Combine all the math emitters.Kenneth Graunke2014-11-132-104/+17
* i965/vec4: Use const references in emit() functions.Kenneth Graunke2014-11-132-15/+14
* i965: Use macros to create prototypes for emitter helpers.Kenneth Graunke2014-11-131-57/+41
* i965: Always enable VF statisticsBen Widawsky2014-11-131-2/+1
* i915: Emit 3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLEVille Syrjälä2014-11-136-17/+17
* i915: Don't call _mesa_meta_glsl_Clear() on gen2Ville Syrjälä2014-11-131-1/+1
* i915: Protect macro argument for TEXTURE_SET()Ville Syrjälä2014-11-131-1/+1
* i915: Kill intel_context::hw_stencilVille Syrjälä2014-11-132-2/+0
* i915: Accept GL_DEPTH_STENCIL GL_DEPTH_COMPONENT formats for renderbuffersVille Syrjälä2014-11-131-0/+9
* i915: Override mip filter to nearest with anisoVille Syrjälä2014-11-131-0/+2
* i915: Use L8A8 instead of I8 to simulate A8 on gen2Ville Syrjälä2014-11-132-3/+2
* i915: Fix GL_DOT3_RGBA a bitVille Syrjälä2014-11-131-2/+3
* i965/cfg: Remove if_block/else_block.Matt Turner2014-11-113-30/+1
* i965/fs: Don't use if_block/else_block in SEL peephole.Matt Turner2014-11-111-6/+11
* i965: Advertise a line width of 40.0 on Cherryview and Skylake.Kenneth Graunke2014-11-081-1/+5
* i965: Advertise larger line widths.Kenneth Graunke2014-11-081-3/+9
* i965: Use ctx->Const.MaxLineWidth when clamping ctx->Line.Width.Kenneth Graunke2014-11-084-5/+8
* i965: Set Line Width correctly on Cherryview and Skylake.Kenneth Graunke2014-11-082-1/+6
* i965: drop the custom gen8_instruction CFLAGEmil Velikov2014-11-071-2/+0
* i965/fs: Wire up control flow correctly in predicated break pass.Matt Turner2014-11-061-3/+7
* i965/cfg: Add functions to get first and last non-CF instructions.Matt Turner2014-11-061-0/+74
* i965: Remove non-existent vertical strides from array.Matt Turner2014-11-061-1/+1
* i965: Convert stride/width/execution size macros into enums.Matt Turner2014-11-061-28/+33
* i965/fs: Remove force uncompressed stack.Matt Turner2014-11-063-27/+0
* i965/fs: Use execution size of 1 for some shader_time operations.Matt Turner2014-11-061-1/+1
* i965/fs: Use mov(4) instructions to read timestamp.Matt Turner2014-11-061-5/+4
* Releasing a surfaceless EGL context doesn't release underlying DRI context.Alexandros Frantzis2014-11-061-2/+6
* i965: Fix sampler state pointer adjustment for nonconst samplersChris Forbes2014-11-051-1/+1
* i965: Re-enable Z16 on Gen8+.Kenneth Graunke2014-11-041-0/+7
* i965: Implement the PMA stall fix.Kenneth Graunke2014-11-044-0/+180
* i965: Add #defines for Broadwell HiZ workarounds in CACHE_MODE_1.Kenneth Graunke2014-11-041-0/+6
* i965: Update compaction code to handle Skylake like Cherryview.Kenneth Graunke2014-11-031-4/+4
* i965: Disable fast color clears on Skylake for now.Kenneth Graunke2014-11-031-1/+1
* i965/skl: Use new MOCS for SKLKristian Høgsberg2014-11-036-17/+33
* i965/skl: Implement workaround for VF Invalidate issueJordan Justen2014-11-031-0/+9
* i965/skl: Update Viewport Z Clip Test Enable bits for Skylake.Kenneth Graunke2014-11-032-2/+10
* i965/skl: Emit extra zeros in 3DSTATE_DS on Skylake.Kenneth Graunke2014-11-031-10/+5
* i965/skl: Init instructions compaction tables for SKLKristian Høgsberg2014-11-031-0/+1
* i965/skl: Add fast clear resolve rect multipliers for SKLKristian Høgsberg2014-11-031-2/+5
* i965/skl: Always emit 3DSTATE_BINDING_TABLE_POINTERS_* on Skylake.Kenneth Graunke2014-11-031-1/+1
* i965/skl: Allocate 16 DWords for SURFACE_STATE on Skylake.Kenneth Graunke2014-11-031-1/+1
* i965/skl: Refactor surface state allocation.Kenneth Graunke2014-11-031-10/+16
* i965/skl: Emit extra zeros in STATE_BASE_ADDRESS on Skylake.Kenneth Graunke2014-11-031-2/+11
* i965/skl: Update stencil reference handling for Skylake.Kenneth Graunke2014-11-033-6/+28
* i965/skl: Set mask bits in PIPELINE_SELECT on Skylake.Kenneth Graunke2014-11-031-1/+1
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