| Commit message (Expand) | Author | Age | Files | Lines |
* | mesa: Fold long lines introduced by the previous patch. | Paul Berry | 2014-01-21 | 4 | -8/+14 |
* | mesa: Replace ctx->Shader.Current{Vertex,Fragment,Geometry}Program with an ar... | Paul Berry | 2014-01-21 | 14 | -22/+22 |
* | mesa: Replace _mesa_program_index_to_target with _mesa_shader_stage_to_program. | Paul Berry | 2014-01-21 | 1 | -1/+1 |
* | i965: Ignore 'centroid' interpolation qualifier in case of persample shading | Anuj Phogat | 2014-01-21 | 1 | -1/+1 |
* | i965: Use sample barycentric coordinates with per sample shading | Anuj Phogat | 2014-01-21 | 4 | -6/+30 |
* | i965: Add an option to ignore sample qualifier | Anuj Phogat | 2014-01-21 | 3 | -4/+4 |
* | i965/fs: Optimize LRP with x == y into a MOV. | Matt Turner | 2014-01-21 | 1 | -0/+10 |
* | i965: Enable AOS optimizations for the geometry shader. | Matt Turner | 2014-01-21 | 1 | -0/+1 |
* | mesa: rename PreferDP4 to OptimizeForAOS. | Matt Turner | 2014-01-21 | 3 | -3/+3 |
* | i965/fs: Print the maximum register pressure. | Matt Turner | 2014-01-21 | 1 | -1/+3 |
* | i965/fs: Show register pressure in dump_instructions() output. | Kenneth Graunke | 2014-01-21 | 3 | -1/+16 |
* | i965: Compute the number of live registers at each IP. | Kenneth Graunke | 2014-01-21 | 3 | -0/+22 |
* | i965/fs: Call opt_peephole_sel later in the optimization loop. | Matt Turner | 2014-01-21 | 1 | -1/+1 |
* | i965/fs: Calculate interference better in register_coalesce. | Matt Turner | 2014-01-21 | 1 | -7/+72 |
* | i965/fs: Support coalescing registers of size > 1. | Matt Turner | 2014-01-21 | 1 | -23/+59 |
* | i965/fs: Assert that var < num_vars. | Matt Turner | 2014-01-21 | 1 | -0/+2 |
* | i965/fs: Add a comment explaining how register coalescing works. | Matt Turner | 2014-01-21 | 1 | -0/+12 |
* | i965/fs: Add and use MAX_SAMPLER_MESSAGE_SIZE definition. | Matt Turner | 2014-01-21 | 3 | -5/+10 |
* | i965/fs: Fix the example about overwriting uniforms in SIMD16. | Matt Turner | 2014-01-21 | 1 | -5/+5 |
* | i965: Print reg_offset for vgrf of size > 1 in dump_instruction(). | Matt Turner | 2014-01-21 | 2 | -4/+4 |
* | i965: Modify some error messages to refer to "vec4" instead of "vs". | Paul Berry | 2014-01-21 | 2 | -5/+5 |
* | i965: Add GS support to INTEL_DEBUG=shader_time. | Paul Berry | 2014-01-21 | 8 | -10/+37 |
* | i965: Reserve space for "Vertex Count" in GS outputs. | Kenneth Graunke | 2014-01-21 | 2 | -0/+13 |
* | i965: Update blitter code for 48-bit addresses. | Kenneth Graunke | 2014-01-20 | 1 | -16/+48 |
* | i965: Update PIPE_CONTROL packet lengths for Broadwell. | Kenneth Graunke | 2014-01-20 | 1 | -2/+20 |
* | i965: Re-combine the Gen4-5 and Gen6+ write_depth_count functions. | Kenneth Graunke | 2014-01-20 | 3 | -23/+10 |
* | i965: Create a helper function for emitting PIPE_CONTROL writes. | Kenneth Graunke | 2014-01-20 | 4 | -93/+69 |
* | i965: Use full-length PIPE_CONTROL packets for workaround writes. | Kenneth Graunke | 2014-01-20 | 1 | -6/+9 |
* | i965: Emit full-length PIPE_CONTROLs for (non-write) flushes. | Kenneth Graunke | 2014-01-20 | 1 | -2/+3 |
* | i965: Create a helper function for emitting PIPE_CONTROL flushes. | Kenneth Graunke | 2014-01-20 | 4 | -86/+66 |
* | i965: Fix MI_STORE_REGISTER_MEM for Broadwell. | Kenneth Graunke | 2014-01-20 | 1 | -10/+23 |
* | i965: Introduce an OUT_RELOC64 macro. | Kenneth Graunke | 2014-01-20 | 2 | -0/+34 |
* | i965: Use the new drm_intel_bo offset64 field. | Kenneth Graunke | 2014-01-20 | 12 | -30/+30 |
* | i965: Delete intel_batchbuffer_emit_reloc_fenced. | Kenneth Graunke | 2014-01-20 | 2 | -30/+0 |
* | i915: Silence warning: unused parameter warning in intel_bufferobj_buffer | Ian Romanick | 2014-01-20 | 3 | -13/+5 |
* | i915: Ensure that intel_bufferobj_map_range meets alignment guarantees | Ian Romanick | 2014-01-20 | 1 | -7/+21 |
* | i965: Ensure that intel_bufferobj_map_range meets alignment guarantees | Ian Romanick | 2014-01-20 | 1 | -7/+21 |
* | i965: Enable ARB_viewport_array | Courtney Goeltzenleuchter | 2014-01-20 | 2 | -0/+17 |
* | i965: Consider all viewports before enabling guardband clipping | Ian Romanick | 2014-01-20 | 1 | -5/+9 |
* | i965: Consider only the scissor rectangle for viewport 0 for clears | Ian Romanick | 2014-01-20 | 1 | -1/+1 |
* | i965: Set all the supported scissor rectangles for GEN7 | Ian Romanick | 2014-01-20 | 1 | -27/+33 |
* | i965: Set all the supported viewports for GEN7 | Ian Romanick | 2014-01-20 | 3 | -37/+48 |
* | i965: Emit writes to viewport index | Ian Romanick | 2014-01-20 | 2 | -3/+7 |
* | i965: Set the maximum VPIndex | Ian Romanick | 2014-01-20 | 3 | -1/+5 |
* | meta: Restore all scissor state | Ian Romanick | 2014-01-20 | 1 | -3/+11 |
* | mesa: Add an index parameter to _mesa_set_viewport | Ian Romanick | 2014-01-20 | 1 | -7/+7 |
* | mesa: Convert gl_context::Viewport to gl_context::ViewportArray | Courtney Goeltzenleuchter | 2014-01-20 | 12 | -52/+52 |
* | mesa: Converty gl_viewport_attrib::X, ::Y, ::Width, and ::Height to float | Courtney Goeltzenleuchter | 2014-01-20 | 5 | -13/+13 |
* | mesa: Update gl_scissor_attrib to support ARB_viewport_array | Courtney Goeltzenleuchter | 2014-01-20 | 11 | -38/+46 |
* | i915,r200,radeon,vega: Change vendor from "VMware, Inc." to "Mesa Project". | José Fonseca | 2014-01-20 | 2 | -2/+2 |