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* i965/fs: Add empirically-determined instruction latencies for gen7.Eric Anholt2012-12-141-3/+179
* i965/fs: Fix the clock increment in scheduling.Eric Anholt2012-12-141-3/+15
* i965/fs: Move the old gen4 bspec-based scheduling info to a helper func.Eric Anholt2012-12-141-33/+41
* i965/fs: Set up gen7 UBO loads as sends from GRFs.Eric Anholt2012-12-145-7/+114
* i965/fs: Before reg alloc, schedule instructions to reduce live ranges.Eric Anholt2012-12-141-6/+41
* i965/fs: Add some optional debug printfs to scheduling.Eric Anholt2012-12-141-0/+21
* i965/fs: Schedule instructions both before and after register allocation.Eric Anholt2012-12-143-18/+78
* i965: Make sure that the shader_time report at context destroy happens.Eric Anholt2012-12-141-0/+3
* i965: Print a total time for the different shader stages.Eric Anholt2012-12-141-10/+38
* i965: Scale shader_time to compensate for resets.Eric Anholt2012-12-144-9/+83
* i965: Adjust the split between shader_time_end() and shader_time_write().Eric Anholt2012-12-144-51/+55
* i965: Fix disassembly of jump targets on Gen7.Kenneth Graunke2012-12-121-4/+9
* i965: Make try_rewrite_rhs_to_dst compare VGRF size to regs written.Kenneth Graunke2012-12-121-1/+1
* mesa: don't advertise ARB_texture_buffer_object in legacy contextsMarek Olšák2012-12-121-4/+1
* mesa: disallow creation of GL 3.1 compatibility contextsMarek Olšák2012-12-121-5/+1
* i965/fs: Improve performance of shaders that start out with a discard.Eric Anholt2012-12-116-7/+148
* i965/fs: Rewrite discards to use a flag subreg to track discarded pixels.Eric Anholt2012-12-118-73/+46
* i965/fs: Add an instruction flag for choosing the flag subregister.Eric Anholt2012-12-116-13/+42
* i965: Let brw_flag_reg() choose the flag reg and subreg.Eric Anholt2012-12-114-7/+7
* i965: Print the flag reg updated by conditional modifiers.Eric Anholt2012-12-111-1/+15
* i965: Add the new flag_reg_nr instruction field from IVB.Eric Anholt2012-12-112-5/+9
* i965: Correct the name and usage of the flag subregister number field.Eric Anholt2012-12-114-15/+15
* i965: Remove bogus flag_reg_nr field from bits3.Eric Anholt2012-12-111-4/+2
* r200: fix broken tcl lightingsmoki2012-12-101-10/+10
* drisw: fix up context and apis for software contextDave Airlie2012-12-091-0/+16
* i965: Add missing _NEW_BUFFERS dirty bit in Gen7 SBE state.Kenneth Graunke2012-12-081-1/+2
* mesa/meta: Move declaration before statements.José Fonseca2012-12-081-1/+2
* intel: Enable ETC2 support on intel hardwareAnuj Phogat2012-12-073-50/+98
* meta: Use #version 300 es for _mesa_glsl_Clear's integer shaders on ES3.Kenneth Graunke2012-12-071-17/+27
* meta: Use #version 300 es in GenerateMipmap shaders on ES3.Kenneth Graunke2012-12-071-11/+13
* meta: Disable GL_FRAGMENT_SHADER_ATI in MESA_META_SHADERStefan Dösinger2012-12-061-0/+11
* radeon: Initialize swrast before setting limitsStefan Dösinger2012-12-061-9/+9
* r200: Initialize swrast before setting limitsStefan Dösinger2012-12-061-10/+9
* i965: Add a debug flag for counting cycles spent in each compiled shader.Eric Anholt2012-12-0517-9/+524
* i965: Add a flag for instructions with normal writemasking disabled.Eric Anholt2012-12-054-0/+4
* i965/fs: Add support for uniform array access with a variable index.Eric Anholt2012-12-044-24/+216
* i965/fs: Conditionalize constant-index UBO load code and add comments.Eric Anholt2012-12-041-28/+33
* i965/fs: Restrict optimization that would fail for gen7's SENDs from GRFsEric Anholt2012-12-043-8/+28
* i965/fs: Allow source mods on gen7+ math.Eric Anholt2012-12-041-1/+1
* i965/fs: Add instruction emit for varying-index reads of uniforms.Eric Anholt2012-12-044-0/+105
* i965/fs: Rename the existing pull constant load opcode.Eric Anholt2012-12-046-14/+16
* i965: Add a header_present flag for setting up dp read messages.Eric Anholt2012-12-043-1/+7
* i965/gen7: Add some safety checks for send messages from GRFs.Eric Anholt2012-12-041-0/+15
* intel: Always enable GL_ARB_framebuffer_objectIan Romanick2012-12-031-2/+1
* i965: Allow INTEL_DEBUG=fs as a synonym for INTEL_DEBUG=wm.Kenneth Graunke2012-12-031-0/+1
* i965: Include codegen time in the INTEL_DEBUG=perf stall detection.Eric Anholt2012-12-032-12/+18
* i965: Don't leak the IR annotation into later instructions.Eric Anholt2012-12-032-0/+2
* i965/vp: Fix crashes with INTEL_DEBUG=vs.Eric Anholt2012-12-031-0/+1
* i965/vs: Fix uninitialized shader pointer used in debug output.Eric Anholt2012-12-031-0/+2
* glx/dri2: add and use new driver hook flush_with_flagsMarek Olšák2012-12-023-3/+3
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