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* dri: Remove unused header files mmx.h and spantmp.hIan Romanick2011-08-262-885/+0
| | | | | | | | | | | | These header files were only used by drivers removed in a previous commit. Acked-by: Kristian Høgsberg <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Alan Coopersmith <[email protected]> Acked-by: Jakob Bornecrantz <[email protected]> Acked-by: Dave Airlie <[email protected]> Build-Tested-by: Jakob Bornecrantz <[email protected]> Tested-by: Eugeni Dodonov <[email protected]>
* dri: Remove driRenderbuffer::backBuffer fieldIan Romanick2011-08-261-8/+0
| | | | | | | | | | | | The tdfx driver was the only user. Acked-by: Kristian Høgsberg <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Alan Coopersmith <[email protected]> Acked-by: Jakob Bornecrantz <[email protected]> Acked-by: Dave Airlie <[email protected]> Build-Tested-by: Jakob Bornecrantz <[email protected]> Tested-by: Eugeni Dodonov <[email protected]>
* dri: Remove all DRI1 driversIan Romanick2011-08-26224-85772/+0
| | | | | | | | | | Acked-by: Kristian Høgsberg <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Alan Coopersmith <[email protected]> Acked-by: Jakob Bornecrantz <[email protected]> Acked-by: Dave Airlie <[email protected]> Build-Tested-by: Jakob Bornecrantz <[email protected]> Tested-by: Eugeni Dodonov <[email protected]>
* mesa: Remove obsolete Windows gldirect and ICD driversIan Romanick2011-08-2659-35834/+0
| | | | | | | | | | Acked-by: Kristian Høgsberg <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Alan Coopersmith <[email protected]> Acked-by: Jakob Bornecrantz <[email protected]> Acked-by: Dave Airlie <[email protected]> Build-Tested-by: Jakob Bornecrantz <[email protected]> Tested-by: Eugeni Dodonov <[email protected]>
* mesa: Remove obsolete linux-fbdev software driverIan Romanick2011-08-262-864/+0
| | | | | | | | | | Acked-by: Kristian Høgsberg <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Alan Coopersmith <[email protected]> Acked-by: Jakob Bornecrantz <[email protected]> Acked-by: Dave Airlie <[email protected]> Build-Tested-by: Jakob Bornecrantz <[email protected]> Tested-by: Eugeni Dodonov <[email protected]>
* i965: Factor our source lists into Makefile.sourcesChad Versace2011-08-262-127/+136
| | | | | | | | | In preparation for porting i965 to Android, factor its source lists into a shared makefile. This prevents duplication of source lists, and hence prevents the Android from breaking as often. Acked-by: Chia-I Wu <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965: Remove all bits of NRM3 and NRM4 codeIan Romanick2011-08-251-31/+0
| | | | | | | Nothing in Mesa generates these opcodes, and i965 hardware cannot support it natively. If support were ever added for this opcode in Mesa, there had better be a lowering pass for hardware that doesn't support it natively.
* Merge branch 'kasanen-post-process-v2'Brian Paul2011-08-252-0/+90
|\ | | | | | | | | | | Conflicts: src/gallium/auxiliary/Makefile src/gallium/auxiliary/SConscript
| * driconf: Add the PP descriptionsLauri Kasanen2011-08-192-0/+90
| | | | | | | | | | Signed-off-by: Lauri Kasanen <[email protected]> Signed-off-by: Brian Paul <[email protected]>
* | radeon: Fix flushing before writing a teximage's BO when !t->bo.Eric Anholt2011-08-241-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | Before, if we ended up here without a BO for our image, but did choose a miptree that had active rendering in the command buffer, our teximage data would jump ahead of the rendering using the old texture contents. This showed up as breakage in gen-teximage and friends in the following commit. Reviewed-by: Ian Romanick <[email protected]>
* | intel: use new gl_texture_image:Face, Level fieldsBrian Paul2011-08-249-51/+34
| | | | | | | | Reviewed-by: Ian Romanick <[email protected]>
* | x11: add missing comma to fix compilationBrian Paul2011-08-241-1/+1
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* | i965: Only map the necessary buffer range in brw_prepare_indicesIan Romanick2011-08-231-3/+2
| | | | | | | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | mesa: Eliminate dd_function_table::MapBufferIan Romanick2011-08-239-133/+50
| | | | | | | | | | | | | | | | | | | | Replace all calls to dd_function_table::MapBuffer with appropriate calls to dd_function_table::MapBufferRange, then remove all the cruft. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | radeon: Hack up an implementation of MapBufferRangeIan Romanick2011-08-231-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | This doesn't implement any of the "cool" features of MapBufferRange. Adding this function is necessary for the next commit in the series. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Cc: Maciej Cencora <[email protected]>
* | mesa: Fix incorrect access parameter passed to MapBufferIan Romanick2011-08-231-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code previously passed GL_DYNAMIC_DRAW for the access parameter. By inspection, I believe that all drivers would treat this as GL_READ_WRITE because it's not GL_READ_ONLY and it's not GL_WRITE_ONLY. It appears the i965 code wants GL_WRITE_ONLY (it's about to write a bunch of data in, never read data), while the arrayelt code is GL_READ_ONLY (just dereffed as arguments to CALL_Whatever*v). Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Keith Whitwell <[email protected]>
* | mesa: Remove target parameter from dd_function_table::FlushMappedBufferRangeIan Romanick2011-08-231-1/+1
| | | | | | | | | | | | | | | | | | | | No driver used that parameter, and most drivers ended up with a bunch of unused-parameter warnings because it was there. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | intel: Correctly check for read-only mappings in intel_bufferobj_map_rangeIan Romanick2011-08-231-1/+3
| | | | | | | | | | | | | | | | | | | | The old code was an obvious cut-and-paste fail from intel_bufferobj_map. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* | mesa: Remove target parameter from dd_function_table::MapBufferRangeIan Romanick2011-08-232-3/+2
| | | | | | | | | | | | | | | | | | | | No driver used that parameter, and most drivers ended up with a bunch of unused-parameter warnings because it was there. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | mesa: Remove target parameter from dd_function_table::GetBufferSubDataIan Romanick2011-08-233-3/+1
| | | | | | | | | | | | | | | | | | | | No driver used that parameter, and most drivers ended up with a bunch of unused-parameter warnings because it was there. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | mesa: Remove target parameter from dd_function_table::BufferSubDataIan Romanick2011-08-233-3/+1
| | | | | | | | | | | | | | | | | | | | No driver used that parameter, and most drivers ended up with a bunch of unused-parameter warnings because it was there. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | mesa: Remove target parameter from dd_function_table::MapBufferIan Romanick2011-08-239-25/+18
| | | | | | | | | | | | | | | | | | | | No driver used that parameter, and most drivers ended up with a bunch of unused-parameter warnings because it was there. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | mesa: Remove target parameter from dd_function_table::UnmapBufferIan Romanick2011-08-239-29/+23
| | | | | | | | | | | | | | | | | | | | No driver used that parameter, and most drivers ended up with a bunch of unused-parameter warnings because it was there. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | i965: Fix typo in 2b224d66a01f3ce867fb05558b25749705bbfe7aEric Anholt2011-08-231-1/+1
| | | | | | | | | | | | | | | | | | Unfortunately, since a previous efficiency improvement, we no longer have any open-source testcases producing register spilling, so this code was untested in the fragment shader path. That should change when we get proper temporary array support in the fragment shader. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40194
* | i965/gen6+: Use non-normalized coordinates for GL_TEXTURE_RECTANGLE.Eric Anholt2011-08-234-2/+19
| | | | | | | | | | Improves performance of a GL_TEXTURE_RECTANGLE microbenchmark by 1.84% +/- .15% (n=3)
* | i965: Implement textureSize (TXS) on Gen4.Kenneth Graunke2011-08-233-6/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Also, remove the BRW_SAMPLER_MESSAGE_SIMD8_RESINFO #define because there totally isn't a SIMD8 variant. Unfortunately, resinfo returns FLOAT32 on Broadwater/Crestline, unlike G45 which returns a proper UINT32. This turns out to be simple, however: when we emit MOVs to select the desired half of the SIMD16 result, we can simply override the register type to be float so it's converted to an integer. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* | i965/fs: Implement textureSize (TXS) on Gen5+.Kenneth Graunke2011-08-235-8/+30
| | | | | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* | i965/fs: Rudimentary support for non-floating point texture results.Kenneth Graunke2011-08-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Not all texturing operations return floating point data. For example, the resinfo message (textureSize or TXS) returns integer data. In the future, we'll also add integer texture support. ir_texture's type field contains this information; use its base type to appropriately type the destination register. We want to keep it as a four component vector, however, since SIMD8 samplers always have a response length of 4. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* | glsl: Add a new ir_txs (textureSize) opcode to ir_texture.Kenneth Graunke2011-08-231-1/+5
| | | | | | | | | | | | | | | | One unique aspect of TXS is that it doesn't have a coordinate. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* | intel: Abort when DRI2 separate stencil handshake failsChad Versace2011-08-221-0/+7
| | | | | | | | | | | | | | | | | | | | When intel_context requires separate stencil but the DRI2 separate stencil handshake fails, then abort and emit an error instructing the user to upgrade the DDX to 2.16.0. CC: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* | i965/gen7: Use align1 mode to set URB_WRITE_HWORD channel enables.Kenneth Graunke2011-08-201-0/+3
| | | | | | | | | | | | | | Makes the new vertex shader backend work on Ivybridge. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | i965/fs: Don't double-convert integer/boolean uniforms.Kenneth Graunke2011-08-191-16/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | When ctx->Const.NativeIntegers is set, Core Mesa loads integer/boolean uniforms directly, rather than loading the floating point equivalent. So, when that's set, we don't need to perform any conversions. Unfortunately, we can't properly support native integers with the old vertex shader backend, so this patch leaves them disabled for now. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | i965/fs: Change incorrect use of 'struct fs_reg' to simply 'fs_reg'.Kenneth Graunke2011-08-191-1/+1
| | | | | | | | | | | | It's actually a class. Signed-off-by: Kenneth Graunke <[email protected]>
* | i965/vs: Implement proper register allocation instead of 1:1 mapping.Eric Anholt2011-08-192-1/+155
| | | | | | | | | | | | Fixes vs-atan-* and several others. This is not the real solution we eventually want, which will pack floats, vec2s, and vec3s into vec4 registers, but this code should provide the framework for that.
* | i965/vs: Add simple dead code elimination.Eric Anholt2011-08-193-0/+38
| | | | | | | | | | This is copied right from the fragment shader. It is needed for real register allocation to work correctly.
* | i965/vs: Copy the live intervals calculation over from the FS.Eric Anholt2011-08-194-0/+139
| | | | | | | | | | | | This is a rather pessimistic calculation, since it doesn't distinguish individual channels of a vec4, or elements of an array, but should be a minimum start for register allocation.
* | i965/vs: Remove stale comment about compressed instructions.Eric Anholt2011-08-191-1/+0
|/ | | | | This was copy'n'paste from the fragment shader, and didn't make sense here.
* meta: use fallback mipmap generation for 1D/2D texture arraysBrian Paul2011-08-191-2/+5
| | | | | | | We could do 1D/2D arrays with textured quad rendering, but it'll take some work (as with 3D textures). Reviewed-by: Ian Romanick <[email protected]>
* mesa: Declare _mesa_meta_begin()/end() as publicChad Versace2011-08-192-142/+147
| | | | | | | | | | | Declare _mesa_meta_begin()/end() in meta.h so that drivers can write custom meta-ops (such as HiZ resolves for i965). This necessitates moving the the META_* macros into meta.h. To prevent naming collisions, this commit renames each macro to be MESA_META_*. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965/fs: Fix 32-bit integer multiplication.Eric Anholt2011-08-172-1/+22
| | | | | | | | | The MUL opcode does a 16bit * 32bit multiply, and we need to do the MACH to get the top 16bit * 32bit added in. Fixes fs-op-mult-int-*, fs-op-mult-ivec* Reviewed-by: Kenneth Graunke <[email protected]>
* xmlpool.h: fix a typoLauri Kasanen2011-08-171-1/+1
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* xmlconfig: Make the error message more informativeLauri Kasanen2011-08-171-1/+1
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* i965/vs: Fix multiplies to actually do 32-bit multiplies.Eric Anholt2011-08-162-1/+22
| | | | Fixes vs-op-mult-int-int and friends.
* i965/vs: Add support for conversion of FIXED_HW_REG src_reg to/from dst_reg.Eric Anholt2011-08-161-0/+2
| | | | This was quietly occurring in some emit code I produced, and failed.
* i965/vs: Fix memory leak of ralloc context for the visitor.Eric Anholt2011-08-161-0/+1
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* i965/vs: Fix condition code for scalar expression all_equals.Eric Anholt2011-08-161-1/+1
| | | | Fixes vs-op-eq-bool-bool.
* i965/vs: Don't assertion fail on vertex texturing.Eric Anholt2011-08-161-1/+6
| | | | | | The linker will reject the program, but we need to survive until then. Fixes abort in glsl1-2D Texture lookup with explicit lod (Vertex shader)
* i965/gen6: Force WHILE exec size to 8.Eric Anholt2011-08-161-4/+2
| | | | | | | | | | We can't just look at the instruction that happens to appear at the start of the loop, because it might be some other exec size and cause us to only loop on the first N channels. We always want 8 in our current code (since 16 doesn't work so we don't do 16-wide fragment in that case). Fixes loop-03.vert, which was triggering the assertions.
* i965/vs: Remove remaining use of foreach_iter.Eric Anholt2011-08-162-9/+5
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* i965/vs: Fix abs/negate handling on attributes.Eric Anholt2011-08-161-2/+9
| | | | Fixes glsl-vs-neg-attribute and glsl-vs-abs-attribute.
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