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* Merge branch 'mesa_7_5_branch'Brian Paul2009-06-244-1/+22
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| * i965: handle OPCODE_SWZ in the glsl pathRoland Scheidegger2009-06-221-0/+1
| * intel: intel_texture_drawpixels() can't handle GL_DEPTH_STENCIL.Michel Dänzer2009-06-221-1/+1
| * i965: added intelFlush() call in intel_get_tex_image()Brian Paul2009-06-221-0/+6
| * intel: Fix other metaops versus GL_COMPILE_AND_EXECUTE dlists.Eric Anholt2009-06-192-3/+3
| * intel: Fix glClear behavior versus display lists.Eric Anholt2009-06-191-1/+1
| * radeons: use dp4 for position invariant vertex programsRoland Scheidegger2009-06-193-0/+6
| * intel: remove extra \n from warning stringBrian Paul2009-06-171-1/+1
| * i965: fix 1D texture borders with GL_CLAMP_TO_BORDERRobert Ellison2009-06-171-0/+10
| * i965: send all warnings through _mesa_warning()Robert Ellison2009-06-171-1/+1
| * i965: fix segfault on low memory conditionsRobert Ellison2009-06-171-0/+7
| * i915: Don't put VBOs in graphics memory unless required for an operation.Eric Anholt2009-06-172-1/+40
| * i915: Fall back on NPOT textured metaops on 830-class.Eric Anholt2009-06-173-0/+30
| * i915: Restore the Viewport and DepthRange functions on 8xx.Eric Anholt2009-06-171-0/+21
| * i956: Make state dependency of SF on drawbuffer bounds match Mesa's.Eric Anholt2009-06-171-2/+5
| * intel: Don't complain on falling back from PBO fastpaths.Eric Anholt2009-06-171-3/+3
| * i915: Use Stencil.Enabled instead of Stencil._Enabled in DrawBuffers.Eric Anholt2009-06-171-1/+1
| * i915: Only use the new 945 cube layout for compressed textures.Eric Anholt2009-06-171-1/+4
| * i965: Fix varying payload reg assignment for the non-GLSL-instructions path.Eric Anholt2009-06-171-8/+10
| * i965: Fix register allocation of GLSL fp inputs.Eric Anholt2009-06-174-13/+27
| * intel: Use FRONT_AND_BACK for StencilOp as well.Eric Anholt2009-06-171-1/+2
| * intel: Use GL_FRONT_AND_BACK for stencil clearing.Eric Anholt2009-06-171-1/+2
| * intel: Skip the DRI2 renderbuffer update when doing Viewport on an FBO.Eric Anholt2009-06-171-1/+1
| * intel: Map write-only buffer objects through the GTT when possible.Eric Anholt2009-06-172-2/+15
| * mesa: added null ptr check in Fake_glXCreatePixmap()Brian Paul2009-06-171-1/+1
| * GLX: attempt to fix glean makeCurrent test cases.Brian Paul2009-06-171-1/+5
* | i965: Disable texture tiling by default.Eric Anholt2009-06-231-5/+1
* | i965: Set the max index buffer address correctly according to the docs.Eric Anholt2009-06-231-1/+1
* | i965: Don't set a reserved bit in MI_FLUSH.Eric Anholt2009-06-231-1/+1
* | i965: Fix depth-texture Y-tiling detection for sized internal formats.Eric Anholt2009-06-234-3/+9
* | i965: Fix packed depth/stencil textures to be Y-tiled as well.Eric Anholt2009-06-232-1/+4
* | intel: Bail on blits with non-tile-aligned offsets.Eric Anholt2009-06-231-6/+18
* | intel: Avoid trying to do blits to Y tiled regions.Eric Anholt2009-06-2310-90/+137
* | intel: Fix some potential writes to zero-copy PBOs when used as regions.Eric Anholt2009-06-235-10/+13
* | intel: Remove long-unused intel_region_fill and intelEmitFillBlit.Eric Anholt2009-06-234-106/+0
* | intel: Refuse to do texture tiling if we don't have the kernel support.Eric Anholt2009-06-231-0/+6
* | Fix crash when debug output is enabled and sarea is notset in r200ClearPauli Nieminen2009-06-231-1/+4
* | i965: Fix warnings in intel_pixel_read.c.Eric Anholt2009-06-221-0/+4
* | intel: Fix glReadPixels regression since changing context init order.Michel Dänzer2009-06-222-4/+4
* | intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt2009-06-194-1/+29
* | intel: Update Mesa state before span setup in glReadPixels.Eric Anholt2009-06-193-3/+13
* | intel: Move intel_pixel_read.c to shared for use with i965.Eric Anholt2009-06-192-306/+307
* | intel: Don't map regions with drm_intel_gem_bo_map_gtt() unless they're tiled.Eric Anholt2009-06-191-2/+4
* | intel: Fix other metaops versus GL_COMPILE_AND_EXECUTE dlists.Eric Anholt2009-06-193-4/+4
* | intel: Fix glClear behavior versus display lists.Eric Anholt2009-06-191-1/+1
* | intel: Do not access pbo's buffer directly when attaching.Chia-I Wu2009-06-191-2/+7
* | intel: Data are copied in the wrong direction when breaking COW tie.Chia-I Wu2009-06-191-1/+1
* | intel: Fix migration from sys_buffer in intel_bufferobj_buffer.Chia-I Wu2009-06-191-3/+7
* | radeon: make cubemap mipmap generation workRoland Scheidegger2009-06-201-16/+13
* | intel: Fixups for 'mesa: create/destroy buffer objects via driver functions'.Michel Dänzer2009-06-193-16/+11
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