summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers
Commit message (Collapse)AuthorAgeFilesLines
* __driConfigOptions must be PUBLIC.Adam Jackson2007-12-242-2/+2
|
* R300: RV410 SE chips have half the pipes of regular RV410Alex Deucher2007-12-241-2/+7
| | | | | This fixes 3D rendering on x700 SE chips. Reported by Kano.
* fix GL_LINE_LOOP with drivers using own render pipeline stage (#12410, #13527)Roland Scheidegger2007-12-229-9/+9
| | | | | | primitive needs to include the begin/end flags (broken since vbo-0.2). Should fix missing first/last line segment on gamma, i810, i915, mga, r200, radeon, s3v, savage, unichrome (r300 already correct). Tested on r200, fixes #13527.
* Silence compiler warnings from XML error macros.Kristian Høgsberg2007-12-211-12/+12
|
* [965] Fix and enable separate stencil.Eric Anholt2007-12-213-4/+14
| | | | | | Note that this does not enable GL_EXT_stencil_two_side, because Mesa's computed _TestTwoSide ends up respecting only STENCIL_TEST_TWO_SIDE_EXT (defaults to GL_FALSE), even if the application uses only GL 2.0 / ATI entrypoints.
* [intel] Move some pixel path support from drivers to shared.Eric Anholt2007-12-219-1245/+1249
|
* intel: cast a pointer to unsigned long, avoid potential error.Xiang, Haihao2007-12-212-2/+2
|
* [965] Enable EXT_framebuffer_object.Eric Anholt2007-12-2028-2575/+324
| | | | | To do so, merge the remainnig necessary code from the buffers, blit, span, and screen code to shared, and replace it with those.
* [965] Actually enable SGIS_generate_mipmap.Eric Anholt2007-12-201-1/+1
|
* [intel] Fix and reenable (software) SGIS_generate_mipmapEric Anholt2007-12-208-27/+71
| | | | | | | The core problem was that _mesa_generate_mipmap was not respecting RowStride of the source image. Additionally, the intel private data associated with the images (level and face) was not being initialized for the _mesa_generate_mipmap-generated images.
* [intel] Allow driver hooks to be NULL in intel_buffers.c and just update flags.Eric Anholt2007-12-201-15/+39
| | | | | The 965 driver relies on flag checking instead of these hooks, and will be using this code soon.
* [i915] Move meta_draw_quad into the vtbl with other meta operations.Eric Anholt2007-12-207-47/+42
|
* i915: avoid dead lock in intel_meta_draw_poly. fix #13696Xiang, Haihao2007-12-201-2/+6
|
* [915] Set cliprects in the drawbuffer software fallback case as well.Eric Anholt2007-12-181-0/+3
| | | | | Otherwise, we may violate cliprect asssertions on clearing the buffers, which isn't affected by the fallback.
* i965: allocate GRF registers before building subroutines,Xiang, Haihao2007-12-193-20/+33
| | | | it ensures there are sufficient registers for all subroutines.
* i965: restore the flag after building the subroutine of theXiang, Haihao2007-12-191-1/+12
| | | | GS thread. fix #13240
* [915] Free dri_bufmgr after mesa context data.Eric Anholt2007-12-181-2/+2
| | | | Fixes a crash when buffer objects are left around until context destroy.
* [915] Make polygon stipple use pre-unpacked pixel data.Eric Anholt2007-12-181-1/+7
| | | | This fixes a crash when stippling using data from a PBO.
* [915] Fix clear color when clearing with triangles.Eric Anholt2007-12-181-6/+2
| | | | | The diffuse color format is always ARGB32, regardless of the destination surface format.
* [INTEL] Fix 965 to use new centralized mipmap pitch functionKeith Packard2007-12-181-3/+3
|
* [Intel] Centralize mipmap pitch computations.Keith Packard2007-12-185-44/+72
| | | | | | | | | | | | mipmap pitches must account for the device alignment requirements, which used to be fairly simple; just align to a 4-byte boundary. However, to allow textures to be drawn to under TTM, they now need to be aligned to a 64-byte boundary. Placing all of the alignment constraints in a single function allows this new constraint to be applied uniformly. There was some pitch constraining code in intel_miptree_create, but that was modifying the pitch long after the miptree had been layed out, so it only served to wreck the mipmap and cause rendering errors.
* [i915] Remove redundant set_draw_region code (like the comment says).Eric Anholt2007-12-171-14/+0
|
* [intel] Improve INTEL_DEBUG=blit description of clearing.Eric Anholt2007-12-172-9/+53
|
* [intel] Fix copy'n'pasteo in decoding of the blit clear packet.Eric Anholt2007-12-171-1/+1
|
* [965] Add decode of 3DSTATE_DRAWING_RECTANGLE.Eric Anholt2007-12-171-0/+20
|
* [965] Allow draw or depth regions to be NULL.Eric Anholt2007-12-172-50/+71
| | | | | With FBOs, we end up wanting to do 3D metaops against one or the other without having to find the other one to fill in if we're not going to draw to it.
* [965] Simplify scissor handling by using DrawBuffer values.Eric Anholt2007-12-172-53/+33
|
* [965] fix bad conflict resolution in debug code.Eric Anholt2007-12-171-1/+1
|
* [965] Replace our own depth constants in intel context with GL context ones.Eric Anholt2007-12-174-15/+6
|
* [965] Fix software fallbacks with region-backed textures.Eric Anholt2007-12-171-0/+16
|
* [intel] Cleanup of */intel_blit.c to bring the two closer.Eric Anholt2007-12-172-228/+227
|
* [965] Output the buffer type in INTEL_DEBUG=bat surface state decode.Eric Anholt2007-12-171-1/+16
|
* i915: Fix issues with glDrawBuffer(GL_NONE).Michel Dänzer2007-12-171-27/+23
| | | | | | | Don't dereference NULL renderbuffer pointer, and make sure the software fallback sticks. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=13694 .
* i965: check NULL pointerXiang, Haihao2007-12-171-1/+4
|
* [i915] Fix missing symbol from 965 changes.Eric Anholt2007-12-162-0/+7
|
* [965] Fully initialize the texture surface key data (padding around GLboolean)Eric Anholt2007-12-161-0/+1
|
* [965] Enable ARB_pixel_buffer_object, and disable broken imaging extension.Eric Anholt2007-12-161-5/+23
| | | | While I haven't tested the imaging extension, this matches what 915 does.
* [965] Move to using shared texture management code.Eric Anholt2007-12-1616-1134/+49
| | | | | | This removes the delayed texture upload optimization from 965, in exchange for bringing us closer to PBO support. It also disables SGIS_generate_mipmap, which didn't seem to be working before anyway, according to the lodbias demo.
* [intel] Whitespace and comment changes to bring intel_mipmap_tree.c closer.Eric Anholt2007-12-152-67/+73
|
* [intel] Merge intel_buffer_objects to shared.Eric Anholt2007-12-156-308/+32
| | | | | 965 gains fixed TTM typing of the buffer object buffers and unused PBO functions, and 915 gains buffer size == 0 fixes from 965.
* [965] Use shared intel_regions.c.Eric Anholt2007-12-159-478/+29
| | | | | This adds (so far) unused PBO functions, and holding the lock while writing to regions (which may be shared static screen regions).
* [intel] Fix uninitialized data in screen-region buffer objects.Eric Anholt2007-12-141-0/+2
|
* [intel] Remove excessive validation debugging.Eric Anholt2007-12-141-1/+0
|
* [intel] Initialize debug flag for dri_bufmgrsEric Anholt2007-12-142-0/+3
|
* [intel] Remove useless intel_region_idle.Eric Anholt2007-12-144-27/+0
| | | | | The idling it was trying to ensure was covered by the intel_miptree_image_map()->intel_region_map() that immediately followed it.
* [intel] warnings cleanupEric Anholt2007-12-146-29/+4
|
* [intel] Remove the relocation buffer lists and just cache one per buffer.Eric Anholt2007-12-141-279/+174
| | | | | | | | | | Each buffer object now has a relocation buffer pointer, which contains the relocations for the buffer if there are any. At the point where we have to create a new type of relocation entry, we can change the code over to allowing multiple relocation lists, but trying to anticipate what that'll look like now just increases complexity. This is a 30% performance improvement on 965.
* [965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt2007-12-1426-831/+965
| | | | | | | | | | | | | | | | | | | | | | | The user-space suballocator that was used avoided relocation computations by using the general and surface state base registers and allocating those types of buffers out of pools built on top of single buffer objects. It also avoided calls into the buffer manager for these small state allocations, since only one buffer object was being used. However, the buffer allocation cost appears to be low, and with relocation caching, computing relocations for buffers is essentially free. Additionally, implementing the suballocator required a don't-fence-subdata flag to disable waiting on buffer maps so that writing new data didn't block on rendering using old data, and careful handling when mapping to update old data (which we need to do for unavoidable relocations with FBOs). More importantly, when the suballocator filled, it had no replacement algorithm and just threw out all of the contents and forced them to be recomputed, which is a significant cost. This is the first step, which just changes the buffer type, but doesn't yet improve the hash table to not result in full recompute on overflow. Because the buffers are all allocated out of the general buffer allocator, we can no longer use the general/surface state bases to avoid relocations, and they are set to 0 instead.
* [intel] Remove broken mutex protection from dri_bufmgrs.Eric Anholt2007-12-132-120/+57
| | | | | Now that the dri_bufmgr is stored in the context rather than the screen, all access to one is single-threaded anyway.
* [intel] Enable INTEL_DEBUG=bufmgr output in TTM mode as well as classic.Eric Anholt2007-12-136-59/+36
|
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 15:36:03 +0000