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* r600: remove remains of old tnl pipelineAlex Deucher2009-10-237-268/+41
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* r600: fix render size predictionAlex Deucher2009-10-233-20/+20
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* r600: remove old tnl pipelineAlex Deucher2009-10-232-192/+34
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* r600: clean up context creationAlex Deucher2009-10-231-102/+100
| | | | Make it more consistent with other radeon drivers.
* Merge branch 'mesa_7_6_branch'Brian Paul2009-10-225-11/+37
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| * intel: flush old context before binding new contextBrian Paul2009-10-221-2/+15
| | | | | | | | | | Per the GLX spec, when changing rendering contexts, the old context should first be flushed.
| * i965: fix hacked Fallback usage in brw_prepare_vertices()Brian Paul2009-10-222-2/+6
| | | | | | | | | | | | | | | | Setting intel->Fallback = 1 clobbered any fallback state that was already set. Not sure where this hack originated (the git history is a little convoluted). Define and use a new BRW_FALLBACK_DRAW bit instead. This shouldn't break anything and could potentially fix some bugs (but no specific ones are known).
| * intel: define INTEL_FALLBACK_DRIVER for driversBrian Paul2009-10-221-0/+1
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| * intel: Fallback field is a bitmask, use GLbitfieldBrian Paul2009-10-223-5/+14
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| * i965: remove unused brw_context::tmp_fallback fieldBrian Paul2009-10-221-1/+0
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| * i965: remove unused BRW_FALLBACK_TEXTURE bitBrian Paul2009-10-221-1/+1
| | | | | | | | | | The value was probably wrong too. It was the same as INTEL_FALLBACK_DRAW_BUFFER.
* | Kill off trident.Corbin Simpson2009-10-229-2988/+0
| | | | | | | | | | Hm. I could have said "chew trident and spit it out," or perhaps "spear trident," instead. Dohoho.
* | Nuke s3v.Corbin Simpson2009-10-2228-7719/+1
| | | | | | | | As per FDO #17889.
* | Merge branch 'mesa_7_6_branch' of ↵Alex Deucher2009-10-223-7/+77
|\| | | | | | | git+ssh://[email protected]/git/mesa/mesa
| * r600: set barrier for tex inst if dst is used earlier, might overwrite it ↵Andre Maasikas2009-10-221-2/+25
| | | | | | | | otherwise
| * r600: need to export something from PSAndre Maasikas2009-10-222-2/+19
| | | | | | | | | | | | | | Also avoids empty shader for "END" - seems to be somewhat valid fp Maybe this can be done differently in the future (fake FRAG_RESULT_COLOR already in Map_Fragment_Program() or is there a way to program the chip to not hang in case of no exports.
| * r600: add beginnings of ARL instructionAndre Maasikas2009-10-222-3/+33
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* | intel: Fix flipped condition in ARB_sync GetSYnciv(GL_SYNC_STATUS).Eric Anholt2009-10-201-1/+1
| | | | | | | | Bug #24435
* | meta: Fix the BufferSubData in meta clear to be BufferData.Eric Anholt2009-10-201-3/+2
| | | | | | | | | | Fixes a 3.4% +/- 1.3% performance regression in my GL demo (n=3). The other meta code could probably also use the same treatment.
* | Merge branch 'mesa_7_6_branch' of ↵Alex Deucher2009-10-197-33/+51
|\| | | | | | | | | | | git+ssh://[email protected]/git/mesa/mesa regenerated lex.yy.c
| * r300: fix texture size handling with size > 2048Mathias Fröhlich2009-10-191-6/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | The in kernel texture check fails because of both bit11 flags being set on 16x16 textures. It tuns out that these bits are still set and not cleared in the pp_txpitch field of the texture. The attached patch at least helps for this case on my machine. It clears the bit 11 from the pitch field if the texture is smaller and masks out that hight bits on the conventional width and height field. Fixes bug 24584
| * r600: Fix size calculation for 24 bit depthRobert Noland2009-10-191-2/+6
| | | | | | | | | | | | | | | | size was being calculated based on 3 bytes per pixel with 24 bit depth instead of 4 bytes. This caused corruption in the bottom 25% of objects. This finishes fixing the menu/text corruption in compiz/kde4. Signed-off-by: Robert Noland <[email protected]>
| * r300: fix vertex program parameters limitsMaciej Cencora2009-10-161-7/+5
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| * Use the right pitch when rendering to a textureOwen Taylor2009-10-151-2/+3
| | | | | | | | | | We need to get the pitch from the texture level we are rendering to, rather than just using the base texel width.
| * r600: FRAG_ATTRIB_WPOS and FRAG_ATTRIB_FOGC appear to be supported.Robert Noland2009-10-151-1/+12
| | | | | | | | | | | | Report unsupported attributes while I'm here. Signed-off-by: Robert Noland <[email protected]>
| * r600: cleanup in r600_cs_process_relocs().Robert Noland2009-10-151-15/+3
| | | | | | | | Signed-off-by: Robert Noland <[email protected]>
| * radeon: return EINVAL for 0 length buffers.Robert Noland2009-10-151-0/+4
| | | | | | | | Signed-off-by: Robert Noland <[email protected]>
| * r600: fix tfp1 bo sizeAndre Maasikas2009-10-151-2/+6
| | | | | | | | | | | | | | | | Setting the wrong bo size resulting in an incomplete read cache flush when reading the texture. This fixes the compiz text corruption. [agd5f: take hw pitch alignment into account]
| * r600: implement ProgramStringNotifyAndre Maasikas2009-10-151-17/+38
| | | | | | | | | | need this to properly test with piglit/glean vert/fragprog tests copied mostly from r300, many thanks to osiris, nha, airlied, others...
| * r600: LIT dst.y gets value from src.xAndre Maasikas2009-10-151-0/+1
| | | | | | | | | | seems I overlooked this when removing hardcoded swizzles for this one previously
| * r600: DPH adds w comp of second operand, so set first one to 1 insteadAndre Maasikas2009-10-151-1/+1
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| * r600: fixup KIL instruction a bitAndre Maasikas2009-10-151-18/+9
| | | | | | | | | | | | | | - KILLGT takes 2 arguments - arb KIL has no dst register - add TODO about clause ending but currently piglit fp-kil passes and does not hang the card
| * r600: use CB_TARGET_MASK instead of CB_SHADER_MASK for setting color maskAndre Maasikas2009-10-151-3/+3
| | | | | | | | | | | | makes blend functions work better Signed-off-by: Dave Airlie <[email protected]>
| * r600: user correct alpha blend factorAndre Maasikas2009-10-151-2/+2
| | | | | | | | Signed-off-by: Dave Airlie <[email protected]>
| * r600: clear position enable bit when when wpos is not used by FPAndre Maasikas2009-10-151-0/+5
| | | | | | | | Makes doom3 alot nicer..
* | intel: Disallow relocations to the byte beyond the end of the bufferChris Wilson2009-10-171-1/+1
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* | mesa: lift default symlinks target into Makefile.templateBrian Paul2009-10-1621-23/+4
| | | | | | | | Driver Makefiles can still add symlink dependencies/rules if needed.
* | mesa: use EXTRA_MODULES and SUBDIRS to build r300 compilerBrian Paul2009-10-162-8/+8
| | | | | | | | | | This is a bit cleaner and avoids rebuilding the r300_dri.so library all the time.
* | mesa: added SUBDIRS support in dri/Makefile.templateBrian Paul2009-10-161-1/+13
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* | mesa: remove unused ctx->Driver.PrioritizeTextures() hookBrian Paul2009-10-142-2/+0
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* | mesa: remove unused ctx->Driver.TextureMatrix() hookBrian Paul2009-10-141-1/+0
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* | r600: enable EXT_vertex_array_bgra extensionsAlex Deucher2009-10-141-0/+1
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* | Merge branch 'mesa_7_6_branch'Brian Paul2009-10-141-3/+3
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| * i965: Fix the last valid address setting for the index buffer.Eric Anholt2009-10-111-1/+1
| | | | | | | | | | | | Again, last valid address, not first invalid address. Fixes regression in 255e5be265133280293bbfd8b2f9b74b2dec50bb that the kernel now catches and caused piglit draw_elements_base_vertex to fail.
| * i965: Fix the bounds emitted in the vertex buffer packets.Eric Anholt2009-10-111-2/+2
| | | | | | | | | | | | | | | | It's the address of the last valid byte, not the address of the first invalid byte. This should also fix problems with rendering with the new sanity checks in the kernel.
* | mesa: remove left-over debug printfBrian Paul2009-10-141-1/+0
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* | intel: fix broken sw generate mipmap pathBrian Paul2009-10-131-0/+22
| | | | | | | | Need to restore code that fixed up the intel_texture_image state.
* | mesa: whitespace fixesBrian Paul2009-10-131-2/+2
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* | mesa: do RTT check in _mesa_meta_check_generate_mipmap_fallback()Brian Paul2009-10-131-7/+48
| | | | | | | | | | | | | | We need to check that we can actually render to the texture's format before doing mipmap generation. This may fix bug 24219.
* | mesa: save/set/restore texture base/wrap state in blitframebuffer_texture()Brian Paul2009-10-121-4/+15
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