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* i965: Fix compile warning about missing opcodes.Eric Anholt2010-12-041-0/+5
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* i965: Update gen6 SF state on fragment program change too.Eric Anholt2010-12-041-1/+3
| | | | | SF state depends on what inputs there are to the fragment program, not just the outputs of the VS.
* i965: Update gen6 WM state on compiled program change, not just FP change.Eric Anholt2010-12-041-1/+3
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* intel: Add an env var override to execute for a different GPU revision.Eric Anholt2010-12-044-9/+15
| | | | | | | Sometimes I'm on the train and want to just read what's generated under INTEL_DEBUG=vs,wm for some code on another generation. Or, for the next gen enablement we'll want to dump aub files before we have the actual hardware. This will let us do that.
* r600c: bump texture limits to hw limitsAlex Deucher2010-12-021-2/+7
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* WIN32_THREADS -> WIN32José Fonseca2010-12-021-2/+3
| | | | | | | | | Fixes nasty bug where some parts of the code didn't define WIN32_THREADS and were using the integer mutex implementation, causing even confusion to the debuggers. And there is little interest of other thread implemenation on Win32 besides Win32 threads.
* r300/compiler: disable the swizzle lowering pass in vertex shadersMarek Olšák2010-12-021-1/+0
| | | | It was a no-op because all swizzles are native there.
* i965: add support for polygon mode on Sandybridge.Xiang, Haihao2010-12-021-0/+42
| | | | This fixes some mesa demos such as fslight/engine in wireframe mode.
* i965: Add support for loops in the VS.Eric Anholt2010-12-011-25/+33
| | | | This follows the changes done for the FS alongside the EU emit code.
* i965: Enable IF statements in the VS.Eric Anholt2010-12-011-3/+0
| | | | | While the actual IF instructions were fixed by Zhenyu, we were still flattening them to conditional moves.
* i965: Add support for gen6 CONTINUE instruction emit.Eric Anholt2010-12-013-4/+28
| | | | At this point, piglit tests for fragment shader loops are working.
* i965: Add support for gen6 BREAK ISA emit.Eric Anholt2010-12-014-10/+112
| | | | | There are now two targets: the hop-to-end-of-block target, and the target for where to resume execution for active channels.
* i965: Add support for gen6 DO/WHILE ISA emit.Eric Anholt2010-12-012-30/+74
| | | | | There's no more DO since there's no more mask stack, and WHILE has been shuffled like IF was.
* i965: Dump the WHILE jump distance on gen6.Eric Anholt2010-12-011-1/+2
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* i915: Correctly generate unconditional KIL instructionsIan Romanick2010-12-011-1/+5
| | | | | | Fixes piglit test glsl-fs-discard-03. NOTE: This is a candidate for the 7.9 branch.
* i915: Request that POW instructions be loweredIan Romanick2010-12-011-0/+1
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* r600c: fix some opcodes on evergreenAlex Deucher2010-12-011-8/+56
| | | | | | | | | | There were a few places where we were using the wrong opcodes on evergreen. arl still needs to be fixed on evergreen; see r600g for reference. NOTE: This is a candidate for the 7.9 branch. Signed-off-by: Alex Deucher <[email protected]>
* r300/compiler: implement and lower OPCODE_CLAMPMarek Olšák2010-12-013-0/+28
| | | | Needed for st/vega.
* i965: also using align1 mode for math2 on sandybridgeZhenyu Wang2010-12-011-6/+50
| | | | | Like Eric's workaround patch of commit 490c23ee6be2e8531b5a14d42f808de83d401130. This forces to align1 mode for math2 too.
* i965: Fix type of gl_FragData[] dereference for FB write.Eric Anholt2010-11-291-1/+3
| | | | | Fixes glsl-fs-fragdata-1, and hopefully Eve Online where I noticed this bug in the generated shader. Bug #31952.
* drivers/x11: unifdef XFree86ServerAdam Jackson2010-11-2913-389/+9
| | | | | | | This code was for the old GLcore build of the software rasteriser. The X server switched to a DRI driver for software indirect GLX long ago. Signed-off-by: Adam Jackson <[email protected]>
* r300/compiler: move util functions to radeon_compiler_utilMarek Olšák2010-11-2610-89/+108
| | | | | | | The compiler seriously needs a cleanup as far as the arrangement of functions is concerned. It's hard to know whether some function was implemented or not because there are so many places to search in and it can be anywhere and named anyhow.
* r300/compiler: add a function for swizzling a maskMarek Olšák2010-11-262-6/+15
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* r300/compiler: remove duplicate function rc_mask_to_swzMarek Olšák2010-11-263-14/+2
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* r300/compiler: fix rc_rewrite_depth_out for it to work with any instructionMarek Olšák2010-11-261-21/+8
| | | | | | It looks like the function was originally written for ARB_fragment_program. NOTE: This is a candidate for the 7.9 branch.
* r300/compiler: Move declaration before code.Vinson Lee2010-11-241-1/+1
| | | | | | Fixes this GCC warning with linux-x86 build. radeon_pair_regalloc.c: In function ‘compute_live_intervals’: radeon_pair_regalloc.c:222: warning: ISO C90 forbids mixed declarations and code
* r300/compiler: Move declaration before code.Vinson Lee2010-11-241-1/+1
| | | | | | Fixes this GCC warning with linux-x86 build. radeon_pair_regalloc.c: In function ‘compute_live_intervals’: radeon_pair_regalloc.c:221: warning: ISO C90 forbids mixed declarations and code
* meta: Mask Stencil.Clear against stencilMax in _mesa_meta_ClearPeter Clifton2010-11-241-1/+2
| | | | | | | | | | | | | | | | | | This fixes incorrect behaviour when the stencil clear value exceeds the size of the stencil buffer, for example, when set with: glClearStencil (~1); /* Set a bit pattern of 111...11111110 */ glClear (GL_STENCIL_BUFFER_BIT); The clear value needs to be masked by the value 2^m - 1, where m is the number of bits in the stencil buffer. Previously, we passed the value masked with 0x7fffffff to _mesa_StencilFuncSeparate which then clamps, NOT masks the value to the range 0 to 2^m - 1. The result would be clearing the stencil buffer to 0xff, rather than 0xfe. Signed-off-by: Peter Clifton <[email protected]> Signed-off-by: Brian Paul <[email protected]>
* x11: remove test_proxy_teximage() functionBrian Paul2010-11-241-38/+1
| | | | This was really just for testing purposes.
* i965: Don't write mrf assignment for pointsize outputKristian Høgsberg2010-11-241-1/+2
| | | | https://bugs.freedesktop.org/show_bug.cgi?id=31894
* i915: Disallow alpha, red, RG, and sRGB as render targetsIan Romanick2010-11-231-1/+7
| | | | | | Fixes bugzilla #31832 NOTE: This is a candidate for the 7.9 branch.
* i965: Use the new embedded compare in SEL on gen6 for VS MIN and MAX opcodes.Eric Anholt2010-11-231-6/+24
| | | | Cuts the extra CMP instruction that used to precede SEL.
* i965: Don't upload line smooth params unless we're line smoothing.Eric Anholt2010-11-231-2/+3
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* i965: Don't upload line stipple pattern unless we're stippling.Eric Anholt2010-11-231-0/+3
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* i965: Don't upload polygon stipple unless required.Eric Anholt2010-11-231-1/+7
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* i965: Move gen4 blend constant color to the gen4 blending file.Eric Anholt2010-11-232-34/+25
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* r300/compiler: Don't allow presubtract sources to be remapped twiceTom Stellard2010-11-231-1/+8
| | | | | | https://bugs.freedesktop.org/show_bug.cgi?id=31193 NOTE: This is a candidate for the 7.9 branch.
* r600c: fix VC flush on cedar and palmAlex Deucher2010-11-221-1/+5
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* r600c: add Ontario Fusion APU supportAlex Deucher2010-11-225-1/+24
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r300/compiler: Add a more efficient version of rc_find_free_temporary()Tom Stellard2010-11-213-23/+110
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* r300/compiler: Enable rename_reg pass for r500 cardsTom Stellard2010-11-212-79/+16
| | | | | In addition, the rename_reg pass has been rewritten to use rc_get_readers().
* r300/compiler: Use presubtract operations as much as possibleTom Stellard2010-11-218-67/+204
| | | | | Previously, presubtract operations where only being used by instructions with less than three source source registers.
* r300/compiler: Convert RGB to alpha in the schedulerTom Stellard2010-11-214-17/+320
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* r300/compiler: Track readers through branches in rc_get_readers()Tom Stellard2010-11-214-38/+65
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* r300/compiler: Handle BREAK and CONTINUE in rc_get_readers()Tom Stellard2010-11-211-0/+2
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* r300/compiler: Add rc_get_readers()Tom Stellard2010-11-215-109/+246
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* r300/compiler: Ignore alpha dest register when replicating the resultTom Stellard2010-11-211-1/+4
| | | | | | | | | | When the result of the alpha instruction is being replicated to the RGB destination register, we do not need to use alpha's destination register. This fixes an invalid "Too many hardware temporaries used" error in the case where a transcendent operation writes to a temporary register greater than max_temp_regs. NOTE: This is a candidate for the 7.9 branch.
* r300/compiler: Use zero as the register index for unused sourcesTom Stellard2010-11-212-0/+6
| | | | | | | | | This fixes an invalid "Too many hardware temporaries used" error in the case where a source reads from a temporary register with an index greater than max_temp_regs and then the source is marked as unused before the register allocation pass. NOTE: This is a candidate for the 7.9 branch.
* r300/compiler: Fix instruction scheduling within IF blocksTom Stellard2010-11-211-17/+20
| | | | | | | | | | | | | Reads of registers that where not written to within the same block were not being tracked. So in a situations like this: 0: IF 1: ADD t0, t1, t2 2: MOV t2, t1 Instruction 2 didn't know that instruction 1 read from t2, so in some cases instruction 2 was being scheduled before instruction 1. NOTE: This is a candidate for the 7.9 branch.
* r300/compiler: Fix register allocator's handling of loopsTom Stellard2010-11-211-10/+21
| | | | NOTE: This is a candidate for the 7.9 branch.
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