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| * r300: Added the vertex program swizzle (aka selection) defines.Oliver McFadden2008-03-012-24/+21
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| * r300: Converted to the new src/dest register defines.Oliver McFadden2008-03-013-24/+4
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| * r300: Removed an obsolete comment from the vertex program header file.Oliver McFadden2008-03-011-4/+0
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| * r300: Converted to the new Math Engine defines.Oliver McFadden2008-03-012-22/+9
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| * r300: Added the Math Engine opcode macro.Oliver McFadden2008-03-011-0/+9
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| * r300: Renamed the Vector Engine opcode macro.Oliver McFadden2008-03-013-40/+40
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| * r300: Converted to the new Vector Engine defines.Oliver McFadden2008-03-014-76/+32
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| * r300: Removed the duplicate dest register defines.Oliver McFadden2008-03-013-12/+8
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| * r300: Removed the duplicate "easy" vertex program macros.Oliver McFadden2008-03-012-21/+19
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| * r300: Added the vertex program src/dest register defines.Oliver McFadden2008-03-011-0/+16
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| * r300: Added the Vector Engine and Math Engine defines from AMD's documentation.Oliver McFadden2008-03-011-2/+84
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| * r300: Moved the vertex and fragment program macros into the appropriate files.Oliver McFadden2008-03-014-151/+121
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* | i965: depth offset on glPolygonMode(GL_LINE/GL_POINT)Xiang, Haihao2008-03-281-2/+2
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* | r300: finish conversion of RS_INST regsDave Airlie2008-03-283-22/+6
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* | r300: move to using RS_INST namesDave Airlie2008-03-285-37/+33
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* | [965] Fix massively broken state cache dirty flagging.Michal Wajdeczko2008-03-261-2/+6
| | | | | | | | | | It was flagging a last_bo update even when last_bo didn't change, but another part was failing to update last_bo when it should have.
* | [intel] Use mesa texmemory functions to allocate teximage Data.Michal Wajdeczko2008-03-262-3/+5
| | | | | | | | | | Failure to consistently do so resulted in mismatched aligned versus unaligned alloc/free.
* | [965] Don't let the negate flags of src0 affect 1 constants in precalc_dst/litEric Anholt2008-03-261-14/+21
| | | | | | | | | | This patch is a variant of a submission by Michal Wajdeczko to fix oglconform fpalu failures.
* | [965] Correctly set read mask for OPCODE_SWZ in pass1.Michal Wajdeczko2008-03-261-1/+1
| | | | | | | | | | | | While OPCODE_SWZ has usually been optimized away in pass0, it may still exist if a SWZ with dst saturate was emitted in pass_fp. Fixes an error in oglconform fpalu.c.
* | [965] Clean up whitespace and dead code from do_unfilled change.Eric Anholt2008-03-261-11/+6
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* | [i915] don't use 4x4 filter for 1D shadowmapZou Nan hai2008-03-261-2/+7
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* | intel: fix the issue "VBO: Cannot allocate memory for a BO" onXiang, Haihao2008-03-253-0/+14
| | | | | | | | 965 after merging intel_context.c from i915 and i965. fix bug# 15152.
* | R300: fix typo r300 fog regAlex Deucher2008-03-241-1/+1
| | | | | | | | Noticed by pzad on IRC
* | [965] Avoid emitting dead code for DPx/math instructions.Michal Wajdeczko2008-03-211-0/+15
| | | | | | | | | | | | The pass1 optimization stage clears out writemasks and registers, but the instructions themselves are still being processed at this stage, and could have resulted in them still being emitted.
* | [965] Improve pinterp performance by delaying reads of just-written regs.Michal Wajdeczko2008-03-211-0/+4
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* | [965] Fix negating of unsigned value in emit_wpos_xy.Michal Wajdeczko2008-03-211-1/+1
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* | [965] Add MVP code for position invariant vertex programs.Michal Wajdeczko2008-03-211-0/+3
| | | | | | | | This fixes the arbvptorus demo.
* | [965] Shuffle state flags to match the order we initialize them in.Michal Wajdeczko2008-03-211-2/+2
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* | intel: Use _mesa_ffs wrapper, and fix a use-after-free with INTEL_DEBUG=buf.Michal Wajdeczko2008-03-211-3/+7
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* | [i965] multiple rendering target fixZou Nan hai2008-03-212-10/+29
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* | [i915] GL_DEPTH_TEXTURE_MODE fixZou Nan hai2008-03-201-3/+4
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* | [965] Initialize region surface key structure padding.Eric Anholt2008-03-191-0/+2
| | | | | | | | Fixes valgrind warnings, and potential performance loss from cache misses.
* | [intel] Fix an uninitialized variable access in PRESUMED_OFFSET clearing.Eric Anholt2008-03-191-2/+2
| | | | | | | | | | It was harmless, as the only time we need to clear PRESUMED_OFFSET, the variable had been initialized already.
* | Radeon 9500 (0x4144) only has one pipeAlex Deucher2008-03-191-0/+4
| | | | | | | | confirmed by Reid Linnemann <[email protected]>
* | [i915] arb point sprite only support in i965Zou Nan hai2008-03-191-1/+1
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* | [i915] fix fragment.positionZou Nan hai2008-03-191-6/+21
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* | [i915] Bug #13634: Fix bugs in 945 cube mipmap layout.Eric Anholt2008-03-181-15/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | The most egregious, and the one the bug report and failure in the cubemap demo were about was introduced with intel_mipmap_pitch_align(), where a "* 2" for the pitch calculation was lost. The base size < 32 case also failed to align, which may have caused problems with render to texture. Another bug would have broken 2x2/1x1 base mipmap levels by placing the data where the hardware wouldn't look for it. Other bugs remain with the layout of the small mipmap faces (hardware looks for them in X,Y,Z,-X,-Y,-Z order along the bottom row, but we lay them out X,-X,Y,-Y,Z,-Z).
* | [i915] Add comments about how cube texture layout works.Eric Anholt2008-03-181-2/+107
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* | [i915] Move miptree layout code into separate functions per target.Eric Anholt2008-03-181-258/+285
| | | | | | | | Also clean up some other miscellaneous formatting nits while I'm at it.
* | [intel] Clarify miptree layout by using byte offsets to images.Eric Anholt2008-03-182-12/+29
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* | [945] Remove conditional in 945 3D mipmap layout checking for cube layout.Eric Anholt2008-03-181-4/+3
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* | Revert "[i965] make stipple pattern continue across GL_LINE_LOOP and ↵Zou Nan hai2008-03-182-3/+3
| | | | | | | | | | | | | | GL_LINE_STRIP" There is no information in GS to determinate when to reset line stipple count, still fallback to software This reverts commit 5a0314b431ab147c6156c3011f4cb54161ba4b25.
* | [i965] make stipple pattern continue across GL_LINE_LOOP and GL_LINE_STRIPZou Nan hai2008-03-182-3/+3
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* | r300: add new rs690 pci idDave Airlie2008-03-181-0/+1
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* | [965] Fix fp temp reg release code to not usually release all temps.Andrzej Trznadel2008-03-171-2/+2
| | | | | | | | Also, use wrapped ffs() instead of native.
* | r300: Simplify r300VAPInputRoute1.Markus Amsler2008-03-171-7/+3
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* | r300: Simplify r300VAPInputRoute0, check for valid input.Markus Amsler2008-03-171-14/+10
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* | [i965] round pointsize to nearest int according to specZou Nan hai2008-03-171-2/+2
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* | intel: fix the error in commit 7ed1fd5d8438e55fe24091844cdfccb0881306bcXiang, Haihao2008-03-171-1/+1
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* | intel: It is needed to allocating texture memory to accommodateXiang, Haihao2008-03-172-25/+35
| | | | | | | | a texture when calling TexImage with pixels set to NULL pointer.
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