aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri
Commit message (Expand)AuthorAgeFilesLines
* r300/compiler: implement SIN+COS+SCS for vertex shadersMarek Olšák2010-06-053-21/+76
* r300/compiler: implement SNE unwound for r3xx VS, natively for r5xx VSMarek Olšák2010-06-052-1/+37
* r300/compiler: implement SEQ unwound for r3xx VS, natively for r5xx VSMarek Olšák2010-06-052-0/+36
* r300/compiler: implement SFL for vertex shadersMarek Olšák2010-06-051-2/+3
* i915: Don't use XRGB8888 on 830 and 845.Eric Anholt2010-06-043-2/+18
* i915: Clamp minimum lod to maximum texture level too.Eric Anholt2010-06-041-1/+3
* intel: Fix intel_compressed_num_bytes for FXT1 after I broke it.Eric Anholt2010-06-041-1/+1
* r300/compiler: print opcode names instead of numbersMarek Olšák2010-06-033-8/+8
* dri/swrast: Remove unnecessary header.Vinson Lee2010-06-021-1/+0
* intel: Remove a leftover DRI1/DRI2 conditionalKristian Høgsberg2010-06-021-7/+2
* intel: Fallback to meta if we're asked to CopyTexImage2D from RGB to RGBAKristian Høgsberg2010-06-011-0/+8
* swrast: add TFP support to swrast.Dave Airlie2010-05-311-0/+69
* gallium: fix TFP on galliumDave Airlie2010-05-311-0/+1
* intel: Initialize batch->reserved_space on allocationChris Wilson2010-05-311-2/+1
* r300: fix blits for textures of width/height greater than 2048 on r5xxMarek Olšák2010-05-291-5/+9
* i965: Add cache unit -> bo name mapping for more gen6 state objects.Eric Anholt2010-05-281-0/+3
* i965: fix PIPE_CONTROL command for gen6.Zou Nan hai2010-05-281-1/+10
* Enable hardware mipmap generation for radeon.Will Dyson2010-05-261-3/+8
* Fix image_matches_texture_obj() MaxLevel checkWill Dyson2010-05-261-4/+7
* Fallback to software render if there is no miptree for an imageWill Dyson2010-05-261-4/+4
* i965: Add support for EXT_timer_query on Ironlake.Eric Anholt2010-05-262-24/+67
* intel: Handle decode of PIPE_CONTROL instructions.Eric Anholt2010-05-261-0/+27
* i965: Move Gen6 debugging emit_mi_flush into the Gen6 block.Eric Anholt2010-05-261-2/+2
* i965: Don't PIPE_CONTROL instruction cache flush.Eric Anholt2010-05-261-1/+0
* i965: Emit MI_FLUSH before PSP on Ironlake for clip max threads errata.Eric Anholt2010-05-261-0/+7
* r300/compiler: implement SGT+SLE opcodesMarek Olšák2010-05-261-0/+20
* r300/compiler: fix dumping r5xx vertex shadersMarek Olšák2010-05-261-0/+3
* r300/compiler: move hardware caps to the radeon_compiler base structMarek Olšák2010-05-266-18/+19
* r300/compiler: shorten swizzle expressionsMarek Olšák2010-05-261-44/+65
* i965: Add support for all 8 possible ARB_draw_buffers in Mesa.Eric Anholt2010-05-232-2/+1
* i965: Fix bit allocation for number of color regions for ARB_draw_buffers.Eric Anholt2010-05-231-1/+1
* i965: remove disabled code for cycling through MRF registers in clipping.Eric Anholt2010-05-202-17/+2
* intel: Throttle after doing copyregion/swapbuffers round tripKristian Høgsberg2010-05-204-35/+29
* r300/compiler: Implement constant foldingNicolai Hähnle2010-05-191-1/+215
* r300/compiler: Emit 0.5 swizzle when necessary.Tom Stellard2010-05-191-1/+3
* i965: Remove constant or ignored-by-hw args from FF sync message setup.Eric Anholt2010-05-184-64/+32
* i965: Revert accidental debug change in 562e2d114ec0cba8Eric Anholt2010-05-181-1/+1
* gen6 fix: fix a wrong bit in binding_table_pointerZou Nan hai2010-05-181-1/+1
* i965: Fix point coordinate replacement after airlied's ffvertex changes.Eric Anholt2010-05-173-2/+24
* i965: Add SF program disasm under INTEL_DEBUG=sf.Eric Anholt2010-05-173-2/+11
* intel: Call intel_draw_buffer() again after _mesa_make_current()Kristian Høgsberg2010-05-171-0/+6
* i965: Make rasterization of single and multiple quad prims match.Eric Anholt2010-05-171-0/+6
* i965: Remove the half-baked code for multiple OQs at the same time.Eric Anholt2010-05-163-21/+13
* i965: Remove unused occlusion query struct field.Eric Anholt2010-05-161-3/+0
* r300/compiler: fix peephole optimizerTom Stellard2010-05-161-1/+14
* r300/compiler: Implement simple peephole optimizerNicolai Hähnle2010-05-168-47/+308
* r300/compiler: silence a warningMarek Olšák2010-05-151-1/+1
* i965: Set the correct provoking vertex for clipped first-mode trifans.Eric Anholt2010-05-141-3/+17
* i965: Add program dumping for INTEL_DEBUG=gs.Eric Anholt2010-05-143-2/+12
* i965: Parse the ff_sync URB send opcode on Ironlake disasm.Eric Anholt2010-05-141-1/+15
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-13 07:39:25 +0000