| Commit message (Expand) | Author | Age | Files | Lines |
... | |
* | i965/brw: Fix emit_depthbuffer() when packed depth/stencil texture is attached | Chad Versace | 2011-06-10 | 1 | -11/+5 |
* | i965/gen6: Add support for gl_PointCoord. | Eric Anholt | 2011-06-09 | 1 | -0/+3 |
* | i965/gen6: Fix point sprite texture coordinate overrides. | Eric Anholt | 2011-06-09 | 1 | -7/+7 |
* | i965/gen6: Refactor SF setup a bit to handle overrides in one place. | Eric Anholt | 2011-06-09 | 1 | -19/+24 |
* | mesa: get rid of homegrown logbase2 implementation in drivers | Roland Scheidegger | 2011-06-09 | 2 | -28/+2 |
* | i965/gen7: Call gen7_create_constant_surface instead of brw_[...]. | Kenneth Graunke | 2011-06-08 | 3 | -3/+15 |
* | i965/gen7: Enable SIMD16 fragment shader dispatch. | Kenneth Graunke | 2011-06-08 | 1 | -2/+6 |
* | i965/gen7: Don't emit 3DSTATE_GS_SVB_INDEX on Ivybridge. | Kenneth Graunke | 2011-06-08 | 1 | -7/+9 |
* | i965/gen7: Program stencil buffers on Ivybridge. | Kenneth Graunke | 2011-06-08 | 1 | -19/+42 |
* | i965/gen7: Add a prepare_depthbuffer function. | Kenneth Graunke | 2011-06-08 | 1 | -0/+15 |
* | i965/gen7: gen7_emit_depthbuffer needs the _NEW_DEPTH dirty bit. | Kenneth Graunke | 2011-06-08 | 1 | -1/+2 |
* | i965/gen7: Remove stencil renderbuffer from gen7_depth_format. | Kenneth Graunke | 2011-06-08 | 1 | -3/+0 |
* | intel: Request DRI2 buffers for separate stencil and hiz | Chad Versace | 2011-06-08 | 3 | -14/+444 |
* | intel: Add assertions to intelCreateBuffer() | Chad Versace | 2011-06-08 | 1 | -3/+12 |
* | intel: Refactor intel_update_renderbuffers() | Chad Versace | 2011-06-08 | 1 | -111/+212 |
* | intel: Add function intel_renderbuffer_set_hiz_region() | Chad Versace | 2011-06-08 | 2 | -0/+17 |
* | intel/intel_context.c: Remove unused functions | Chad Versace | 2011-06-08 | 1 | -48/+0 |
* | intel: Add flags to intel_screen for hiz and separate stencil | Chad Versace | 2011-06-08 | 3 | -7/+73 |
* | intel: Define enum intel_dri2_has_hiz | Chad Versace | 2011-06-08 | 1 | -0/+56 |
* | intel: Define span functions for S8 renderbuffers | Chad Versace | 2011-06-08 | 1 | -0/+64 |
* | i965/brw: Emit state for hiz and separate stencil buffers | Chad Versace | 2011-06-08 | 2 | -9/+107 |
* | mga: enable GL_ARB_vertex_array_object extension | Nicolas Kaiser | 2011-06-07 | 1 | -0/+2 |
* | intel: Update intel-decode.c from intel-gpu-tools. | Eric Anholt | 2011-06-07 | 2 | -88/+785 |
* | intel: Implement glFinish() correctly by waiting on all previous rendering. | Eric Anholt | 2011-06-07 | 3 | -16/+13 |
* | radeon: Use pciid list to generate PCI_CHIP_<FAMILY>_<ID> defines | Benjamin Franzke | 2011-06-07 | 1 | -491/+9 |
* | i965: Fix flipped GT1 vs GT2 URB VS entry count limits. | Eric Anholt | 2011-06-07 | 1 | -2/+2 |
* | i965: Update SURFACE_STATE dumping for Ivybridge. | Kenneth Graunke | 2011-06-06 | 1 | -3/+43 |
* | i965: Update SAMPLER_STATE dumping for Ivybridge. | Kenneth Graunke | 2011-06-06 | 1 | -1/+53 |
* | i965: Update SF_CLIP_VIEWPORT state dumping for Ivybridge. | Kenneth Graunke | 2011-06-06 | 1 | -2/+38 |
* | dri/nouveau: fix gnome-shell segfault | Ben Skeggs | 2011-06-06 | 1 | -1/+1 |
* | i965: Drop remaining strict conformance fallback for GL_POINT_SMOOTH. | Eric Anholt | 2011-06-03 | 1 | -30/+0 |
* | i965: Drop strict conformance fallback for GL_LINE_STIPPLE. | Eric Anholt | 2011-06-03 | 1 | -18/+0 |
* | i965: Drop strict conformance fallback for GL_LINE_SMOOTH. | Eric Anholt | 2011-06-03 | 1 | -9/+0 |
* | i965: Drop strict conformance fallback for GL_POLYGON_SMOOTH. | Eric Anholt | 2011-06-03 | 1 | -6/+0 |
* | i965: Drop INTEL_CONFORMANCE=2 fallback code. | Eric Anholt | 2011-06-03 | 1 | -3/+0 |
* | dri: add missing files from 873379a8818eed9ab16c24728b7091a3a3705c5b | Brian Paul | 2011-06-02 | 2 | -0/+112 |
* | dri/nouveau: Fix build with --enable-shared-dricore. | Johannes Obermayr | 2011-06-02 | 17 | -140/+56 |
* | r300: remove MIN3 macro, already defined in macros.h | Brian Paul | 2011-06-02 | 1 | -1/+0 |
* | i965: Raise const.MaxTextureLevels to 14 (8192) | Chris Wilson | 2011-06-02 | 1 | -3/+3 |
* | r600c: add support for llano | Alex Deucher | 2011-05-31 | 6 | -1/+98 |
* | i965/fs: Use the embedded compare in SEL on gen6+. | Eric Anholt | 2011-05-31 | 2 | -16/+30 |
* | i965: Remove brw_surface_state struct that is now unused. | Eric Anholt | 2011-05-31 | 1 | -74/+0 |
* | i965: Switch brw_state_dump to using bitshifting for surface state. | Eric Anholt | 2011-05-31 | 2 | -9/+17 |
* | i965: Replace struct with bit shifting for WM null surfaces. | Eric Anholt | 2011-05-31 | 1 | -13/+13 |
* | i965: Replace struct with bit shifting for WM pull constant surfaces. | Eric Anholt | 2011-05-31 | 2 | -35/+17 |
* | i965: Replace struct with bit shifting for WM render target surfaces. | Eric Anholt | 2011-05-31 | 2 | -31/+45 |
* | i965: Replace structs with bitfield shifting for WM texture surfaces. | Eric Anholt | 2011-05-31 | 1 | -32/+35 |
* | i965: Add defines for surface state setup using bitfield shifting. | Eric Anholt | 2011-05-31 | 1 | -1/+33 |
* | i965: Don't compute brw->wm.input_size_masks when it's unused. | Eric Anholt | 2011-05-31 | 1 | -1/+11 |
* | i965: Drop a gratuitous "if" that the compiler didn't eliminate at -O2. | Eric Anholt | 2011-05-31 | 1 | -10/+8 |