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| * i965: #include prog_print.h to silence warningBrian Paul2009-04-271-0/+1
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| * i965: only upload constant buffer data when we actually need the const bufferBrian Paul2009-04-276-17/+22
| | | | | | | | | | | | | | | | | | Make the use_const_buffer field per-program and only call the code which updates the constant buffer's data if the flag is set. This should undo the perf regression from 20f3497e4b6756e330f7b3f54e8acaa1d6c92052 (cherry picked from master, commit dc9705d12d162ba6d087eb762e315de9f97bc456)
| * i965: rework GLSL/WM register allocationBrian Paul2009-04-242-48/+168
| | | | | | | | | | | | | | | | | | Use a bitvector of used/free flags. If we run out of temps, examine the live intervals of the temp regs in the program and free those which are no longer alive. Also, enable the new WM const buffer code.
| * i965: disable debug printfBrian Paul2009-04-221-1/+1
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| * i965: enable VS constant buffersBrian Paul2009-04-221-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In the VS constants can now be handled in two different ways: 1. If there's room in the GRF, put constants there. They're preloaded from the CURBE prior to VS execution. This is the historical approach. The problem is the GRF may not have room for all the shader's constants and temps and misc registers. Hence... 2. Use a separate constant buffer which is read from using a READ message. This allows a very large number of constants and frees up GRF regs for shader temporaries. This is the new approach. May be a little slower than 1. 1 vs. 2 is chosen according to how many constants and temps the shader needs.
| * i965: define BRW_MAX_GRFBrian Paul2009-04-221-0/+3
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| * i965: remove old code to init surface-related cache IDsBrian Paul2009-04-221-14/+0
| | | | | | | | These types are only found in the new surface state cache now.
| * i965: comments, reformattingBrian Paul2009-04-221-17/+38
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| * i965: actually use the new, second surface state cacheBrian Paul2009-04-221-17/+22
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| * i965: checkpoint commit: use two state caches instead of oneBrian Paul2009-04-224-45/+88
| | | | | | | | | | | | | | The new, second cache will only be used for surface-related items. Since we can create many surfaces the original, single cache could get filled quickly. When we cleared it, we had to regenerate shaders, etc. With two caches, we can avoid doing that.
| * i965: remove unused state atom entriesBrian Paul2009-04-221-9/+1
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| * i965: the brw_constant_buffer state atom is no longer dynamicBrian Paul2009-04-222-33/+5
| | | | | | | | No more dynamic atoms so we can simplify the state validation code a little.
| * i965: add _NEW_PROGRAM_CONSTANTS to mesa_bits[] listBrian Paul2009-04-221-0/+1
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| * i915: check the new _NEW_PROGRAM_CONSTANT flagBrian Paul2009-04-221-1/+1
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| * i965: use _NEW_PROGRAM_CONSTANTS and always create new const buffersBrian Paul2009-04-221-14/+14
| | | | | | | | | | | | When program constants change we create a new VS constant buffer instead of re-using the old one. This allows us to have several const buffers in flight with vertex rendering.
| * i965: updates to some debug codeBrian Paul2009-04-221-6/+6
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| * i965: use new _NEW_PROGRAM_CONSTANTS flag instead of dynamic flagsBrian Paul2009-04-221-8/+1
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| * r200/r300/r500: add _NEW_PROGRAM_CONSTANTS flagBrian Paul2009-04-224-6/+10
| | | | | | | | | | | | Make sure we detect constant buffer changes indicated by the new flag. Should be able to remove _NEW_PROGRAM (and _NEW_MODELVIEW, _NEW_LIGHT, etc) from several places (someday.
* | r300: Increase reference count of texture objects referenced by current state.Michel Dänzer2009-04-304-9/+11
| | | | | | | | | | | | | | Fixes a use-after-free reported in http://bugs.freedesktop.org/show_bug.cgi?id=20539, so this possibly fixes that bug. It has been confirmed to fix http://bugs.freedesktop.org/show_bug.cgi?id=17895 .
* | R300: add quadpipe overridesAlex Deucher2009-04-281-4/+13
| | | | | | | | | | RV410 SE chips only have 1 quadpipe. Also, handle other R300 chip with quadpipe override
* | i965: avoid segfault in intel_update_renderbuffers() if using DRI1Brian Paul2009-04-281-3/+4
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* | i965: only upload constant buffer data when we actually need the const bufferBrian Paul2009-04-276-17/+17
| | | | | | | | | | | | | | Make the use_const_buffer field per-program and only call the code which updates the constant buffer's data if the flag is set. This should undo the perf regression from 20f3497e4b6756e330f7b3f54e8acaa1d6c92052
* | r300: always emit output insts after all KIL instsMaciej Cencora2009-04-272-3/+46
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* | intel: Fix more issues with the combined depth-stencil attachmentIan Romanick2009-04-241-6/+13
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* | intel: Initialize region ptr to prevent assertion in intel_region_referenceIan Romanick2009-04-241-1/+1
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* | intel / DRI2: When available, use DRI2GetBuffersWithFormatIan Romanick2009-04-242-16/+99
| | | | | | | | | | | | | | | | | | | | | | This interface gives the driver two important features. First, it can allocate the (fake) front-buffer only when needed. Second, it can tell the buffer allocator the format of buffers being allocated. This enables support for back-buffer and depth-buffer with different bits per pixel. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* | i965: use drm_intel_gem_bo_map/unmap_gtt() when possible, otherwise ↵Brian Paul2009-04-241-5/+9
| | | | | | | | | | | | dri_bo_subdata() This wraps up the unfinished business from commit a9a363f8298e9d534e60e3d2869f8677138a1e7e
* | i965: fix point size issueRoland Scheidegger2009-04-241-1/+1
| | | | | | | | | | need to clamp point size to user set min/max values, even for constant point size. Fixes glean pointAtten test.
* | i965: revert part of commit 4f4907d69f9020ce17aef21b6431d2dd65e01982Brian Paul2009-04-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | The drm_intel_gem_bo_map_gtt() call that replaced dri_bo_map() is producing errors like: intel_bufmgr_gem.c:689: Error preparing buffer map 39 (vp_const_buffer): Invalid argument . and returning NULL, causing a segfault in the memcpy(). Just reverting until we can get to the root issue...
* | i915: fix fix for anisotropic filteringRoland Scheidegger2009-04-231-2/+7
| | | | | | | | forgot to commit the changes to actually support 4x aniso filtering...
* | i965: Support drawing to FBO cube faces other than positive X.Eric Anholt2009-04-231-7/+11
| | | | | | | | Also fixes drawing to 3D texture depth levels.
* | intel: Take advantage of GL_READ_ONLY_ARB to map to GEM bo_map write flag.Eric Anholt2009-04-232-5/+4
| | | | | | | | | | This is a CPU win in general, but in particular reduces the pain of Mesa's calculation of min/max indices in DrawElements (wtf?).
* | intel: fix max anisotropy supportedRoland Scheidegger2009-04-225-3/+7
|/ | | | | | i915 actually supports up to 4 (according to header file - not tested), i965 up to 16 (code already handled this but slightly broken), so don't use 2 for all chips, even though angular dependency is very high.
* i965: const correctnessBrian Paul2009-04-211-49/+49
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* r300: r300 hw doesn't support any input modifiers in tex instsMaciej Cencora2009-04-211-2/+1
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* r300: fix register-negate branch merge regressionMaciej Cencora2009-04-203-39/+12
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* i965: use region width, height in brw_update_renderbuffer_surface()Brian Paul2009-04-181-2/+2
| | | | | Fixes a regression from commit 2c30fd84dfa052949a117c78d932b58c1f88b446 seen with DRI1.
* intel: #include polygon.h to silence warningBrian Paul2009-04-181-0/+1
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* intel: Handle ARB_vertex_buffer_object state in intel_clear_tris().Michel Dänzer2009-04-181-0/+5
| | | | Fixes gearsvbo app by Michael Clark.
* intel: make sure polygon mode is set properly in intel_clear_tris()Brian Paul2009-04-171-0/+2
| | | | Fixes progs/glsl/skinning.c demo.
* i915: fix broken indirect constant buffer readsBrian Paul2009-04-173-51/+40
| | | | | | | | The READ message's msg_control value can be 0 or 1 to indicate that the Oword should be read into the lower or upper half of the target register. It seems that the other half of the register gets clobbered though. So we read into two dest registers then use a MOV to combine the upper/lower halves.
* dri: __driUtilMessage(): not all messages are errorsBrian Paul2009-04-171-1/+1
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* i965: updated CURBE allocation codeBrian Paul2009-04-173-8/+15
| | | | | Now that we have real constant buffers, the demands on the CURBE are lessened. When we use real VS/WM constant buffers we only use the CURBE for clip planes.
* Merge branch 'register-negate'Brian Paul2009-04-1614-109/+93
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| * mesa: merge the prog_src_register::NegateBase and NegateAbs fieldsBrian Paul2009-04-1414-109/+93
| | | | | | | | | | | | There's really no need for two negation fields. This came from the GL_NV_fragment_program extension. The new, unified Negate bitfield applies after the absolute value step.
* | i915: Remove dead i830TexEnv and i915TexEnv.Eric Anholt2009-04-165-182/+0
| | | | | | | | | | These LOD bias updates are covered by the texture state uploads in *_texstate.c now.
* | intel: Add support for argb1555, argb4444 FBOs and fix rgb565 fbo readpixels.Eric Anholt2009-04-169-125/+346
| | | | | | | | | | | | Also enable them all regardless of screen bpp, as 32 bpp what I've been testing against, and haven't been able to detect any screen bpp-specific troubles with them.
* | i965: disable using immediate values for MOV instructionsBrian Paul2009-04-161-1/+3
| | | | | | | | | | | | For some reason, MOV instructions using immediate src values don't seem to work reliably on the GLSL path. Disable them for now (falling back to const buffer reads). This fixes a bunch of glean glsl1 failures.
* | i965: minor debug output changesBrian Paul2009-04-161-3/+3
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* | i965: const buffer debug code (disabled)Brian Paul2009-04-161-0/+12
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