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* i965: Enable ARB_shader_atomic_counter_opsIan Romanick2016-10-044-6/+50
* i965: Refactor emission of atomic counter operationsIan Romanick2016-10-044-30/+27
* i965: fix unused variable warning in brw_emit_gpgpu_walker()Timothy Arceri2016-10-051-2/+1
* i965: add MAYBE_UNUSED to assert paramTimothy Arceri2016-10-051-1/+1
* i965: wrap unused function in #ifndef NDEBUGTimothy Arceri2016-10-051-0/+2
* i965: fix unused variable warning in gen7_block_read_scratch()Timothy Arceri2016-10-051-2/+1
* i965: add MAYBE_UNUSED to assert paramTimothy Arceri2016-10-051-1/+1
* anv/gen7: Make use of local variable prog_dataAnuj Phogat2016-10-041-2/+2
* i965/gen8+: Enable GL_OES_viewport_arrayAnuj Phogat2016-10-042-2/+4
* i965: Only emit 1 viewport when possible.Kenneth Graunke2016-10-0310-30/+75
* i965: rename max_ds_* variable to max_tes_*Timothy Arceri2016-10-034-5/+5
* i965: rename max_hs_* variables to max_tcs_*Timothy Arceri2016-10-034-5/+5
* i965: Drop pointless stage == MESA_SHADER_FRAGMENT checks.Kenneth Graunke2016-10-021-5/+1
* i915/i965: remove commented out warningTimothy Arceri2016-10-012-6/+2
* i965: Remove useless (harmful) assertionBen Widawsky2016-09-281-1/+1
* glsl: don't crash when dumping shaders if some come from cacheTimothy Arceri2016-09-281-4/+10
* i965: create populate key functions for tcs and tesTimothy Arceri2016-09-274-68/+88
* i965: make gs key generation helper available to shader cacheTimothy Arceri2016-09-272-1/+5
* i965: make vs and fs key generation helpers available to shader cacheCarl Worth2016-09-274-2/+10
* i965: stop passing stage as a function parameterTimothy Arceri2016-09-261-5/+3
* i965: Enable EGL_KHR_gl_texture_3D_imageAdam Jackson2016-09-231-0/+3
* i915: Enable EGL_KHR_gl_texture_3D_imageAdam Jackson2016-09-231-0/+3
* i965: get rid of duplicated values from gen_device_infoLionel Landwerlin2016-09-2326-79/+71
* intel/i965: make gen_device_info mutableLionel Landwerlin2016-09-2318-53/+52
* nir: Allow opt_peephole_sel to be more aggressive in flattening IFs.Eric Anholt2016-09-221-1/+1
* i965: Enable ES 3.2 on Skylake.Kenneth Graunke2016-09-211-1/+2
* i965: implement querying __DRI_IMAGE_ATTRIB_OFFSET.Chuanbo Weng2016-09-211-2/+7
* i965/ir: Test thread dispatch packing assumptions.Francisco Jerez2016-09-211-0/+30
* i965/ir: Pass identity mask to brw_find_live_channel() in the packed dispatch...Francisco Jerez2016-09-212-3/+11
* i965/ir: Skip eliminate_find_live_channel() for stages with sparse thread dis...Francisco Jerez2016-09-213-0/+65
* i965/fs: Take Dispatch/Vector mask into account in FIND_LIVE_CHANNELJason Ekstrand2016-09-215-13/+50
* i965/reg: Make brw_sr0_reg take a subnr and return a vec1 regJason Ekstrand2016-09-212-13/+9
* i965: Rename intelScreen to screen.Kenneth Graunke2016-09-2028-170/+170
* i965: Rename __DRIScreen pointers to "dri_screen".Kenneth Graunke2016-09-206-83/+85
* mesa: Implement ARB_shader_viewport_layer_array for i965Dylan Baker2016-09-201-0/+1
* i965: Drop assertion about buffer offset at draw time.Eric Anholt2016-09-171-11/+0
* i965: enable ARB_ES3_2_compatibility on gen8+Ilia Mirkin2016-09-151-0/+1
* i965/nir: Roll set_default_interpolation into lower_fs_inputsJason Ekstrand2016-09-153-39/+26
* i965/fs: Use NIR for handling forced per-sample interpolationJason Ekstrand2016-09-153-40/+12
* nir: Add a flag to lower_io to force "sample" interpolationJason Ekstrand2016-09-152-11/+11
* i965/fs: Use sample interpolation for interpolateAtCentroid in persample modeJason Ekstrand2016-09-151-0/+26
* intel/blorp: Stop setting 3DSTATE_DRAWING_RECTANGLEJason Ekstrand2016-09-141-0/+5
* intel/blorp: Emit 3DSTATE_MULTISAMPLE directlyJason Ekstrand2016-09-141-13/+0
* i965/vec4: Assert that pull constant load offsets are 16B-aligned.Francisco Jerez2016-09-141-0/+1
* i965/vec4: Assert that ATTR regions are register-aligned.Francisco Jerez2016-09-141-0/+1
* i965/vec4: Don't spill non-GRF-aligned register regions.Francisco Jerez2016-09-142-2/+5
* i965/vec4: Fix copy propagation for non-register-aligned regions.Francisco Jerez2016-09-141-3/+6
* i965/vec4: Compare full register offsets in cmod propagation.Francisco Jerez2016-09-141-1/+1
* i965/vec4: Assign correct destination offset to rewritten instruction in regi...Francisco Jerez2016-09-141-2/+1
* i965/vec4: Don't coalesce registers with overlapping writes not matching the ...Francisco Jerez2016-09-141-4/+6
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