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* i965: Fix the SF Vertex URB Read Length calculation for Sandybridge.Kenneth Graunke2013-02-031-16/+18
* i965: Compute the maximum SF source attribute.Kenneth Graunke2013-02-033-4/+12
* i965: Refactor Gen6+ SF attribute override code.Kenneth Graunke2013-02-031-12/+13
* i965: Remove dead field brw_wm_prog_data::error.Kenneth Graunke2013-02-031-1/+0
* i965: Remove dead field brw_context::constant_map.Kenneth Graunke2013-02-031-1/+0
* swrast: Fix memory leak.Vinson Lee2013-02-011-0/+1
* intel: implement create image from textureAbdiel Janulgue2013-02-011-21/+138
* intel: Account for mt->offset in intel_miptree_mapAbdiel Janulgue2013-02-011-2/+2
* intel: Create a miptree using offsets in intel_set_texture_image_regionAbdiel Janulgue2013-02-011-7/+53
* i965: Account for offsets when updating SURFACE_STATE.Abdiel Janulgue2013-02-012-2/+21
* intel: add pixel offset calculator for miptree levelsAbdiel Janulgue2013-02-012-0/+21
* intel: Expose intel_miptree_create_internal as intel_miptree_create_layout.Abdiel Janulgue2013-02-012-14/+25
* intel: expose dimensions and offsets of a miptree level in DRIImageAbdiel Janulgue2013-02-011-0/+7
* i965: Add chipset limits for Haswell GT1/GT2.Kenneth Graunke2013-01-281-1/+17
* intel: Un-hardcode lengths from blitter commands.Kenneth Graunke2013-01-282-7/+7
* intel: Use a CPU map of the batch on LLC-sharing architectures.Eric Anholt2013-01-294-9/+24
* i965: Fix assignment instead of comparison in asserts.Vinson Lee2013-01-281-2/+2
* intel: Typo fix: "pitsh" -> "pitch"Paul Berry2013-01-281-1/+1
* i965: Enable ARB_shading_language_packingMatt Turner2013-01-251-0/+1
* i965: Assert that the 4x8 pack/unpack operations have been loweredMatt Turner2013-01-253-0/+12
* i965: Lower the 4x8 pack/unpack operationsMatt Turner2013-01-251-1/+5
* i965: Pass in the glarray to get_surface_type.Eric Anholt2013-01-251-29/+22
* i965: Remove nonsense comment.Eric Anholt2013-01-251-2/+0
* i965: Remove NDEBUG undef that was snuck in.Eric Anholt2013-01-251-2/+0
* i965: reuse _mesa_sizeof_type for index buffer types.Eric Anholt2013-01-251-24/+2
* i965: Reuse precalculated ib_type_size value.Eric Anholt2013-01-251-1/+1
* i965: Drop debug check for knowing the size of a type.Eric Anholt2013-01-251-2/+1
* i965: Stop worrying about alignment of vertex data.Eric Anholt2013-01-251-7/+1
* i965: Use the glarray _ElementSize that Mesa tracks for us.Eric Anholt2013-01-252-8/+4
* glsl: Add ir_variable::is_in_uniform_block predicateIan Romanick2013-01-252-2/+2
* glsl: Add GLSL_TYPE_INTERFACEIan Romanick2013-01-254-0/+4
* glsl: Replace most default cases in switches on GLSL typeIan Romanick2013-01-254-7/+17
* i965: Correct gen6+ guardband calculation.Eric Anholt2013-01-252-9/+21
* i965: Use GL_RED for DEPTH_TEXTURE_MODE in ES 3.0 for unsized formats.Kenneth Graunke2013-01-254-7/+21
* i965: Bump maximum supported ES2 context version to 3.0Chad Versace2013-01-251-1/+1
* i965/Gen6+: Enable ARB_ES3_compatibility extensionPaul Berry2013-01-251-0/+1
* i965/fs/gen7: Fix fatal typo in unpackHalf2x16Chad Versace2013-01-241-1/+1
* i965/fs/gen7: Emit code for GLSL 3.00 pack/unpack operations (v4)Chad Versace2013-01-245-3/+144
* i965/vs/gen7: Emit code for GLSL ES 3.00 pack/unpack operations (v3)Chad Versace2013-01-243-0/+146
* i965: Quote the PRM on a HorzStride subtletyChad Versace2013-01-241-1/+4
* i965: Add opcodes for F32TO16 and F16TO32Chad Versace2013-01-244-0/+8
* i965: Lower the GLSL ES 3.00 pack/unpack operations (v2)Chad Versace2013-01-241-0/+32
* i965/disasm: Fix horizontal stride of dest registersChad Versace2013-01-241-3/+6
* intel: Fix glCopyTexSubImage on buffers whose width >= 32kbytesPaul Berry2013-01-241-0/+21
* glsl: Eliminate ambiguity between function ins/outs and shader ins/outsPaul Berry2013-01-244-9/+11
* i965/vs: Do headerless texturing for texelFetchOffset().Kenneth Graunke2013-01-241-2/+4
* intel: Fix ReadPixels on buffers whose width >= 32kbytesPaul Berry2013-01-241-4/+24
* intel: callocing a 32 byte temp is silly, so don'tIan Romanick2013-01-241-3/+3
* intel: Enable S3TC extensions alwaysIan Romanick2013-01-231-6/+4
* mesa: Use a single flag for the S3TC extensions that don't require on-line co...Ian Romanick2013-01-235-5/+6