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* intel: Fix memory leak in case of renderbuffer bad formatVinson Lee2009-10-281-0/+1
* intel: Fix memory leak in event of mip tree allocation failureVinson Lee2009-10-281-1/+3
* intel: Fix flipped condition in ARB_sync GetSYnciv(GL_SYNC_STATUS).Eric Anholt2009-10-271-1/+1
* intel: added region draw_x/y offsets in x/y_tile_swizzle() funcsBrian Paul2009-10-271-0/+6
* intel: fix src offset bug in do_copy_texsubimage()Brian Paul2009-10-271-1/+1
* i915: Fix driver for the miptree x/y offset changes.Eric Anholt2009-10-272-6/+20
* i965: be clear that the Fallback field is a boolean, not a bitfieldBrian Paul2009-10-273-4/+8
* Revert "i965: fix hacked Fallback usage in brw_prepare_vertices()"Brian Paul2009-10-272-6/+2
* intel: fix GL state bugs in intel_texture_bitmap()Brian Paul2009-10-261-4/+3
* intel: Keep track of x,y offsets in miptrees and use them for blitting.Eric Anholt2009-10-238-140/+118
* intel: flush old context before binding new contextBrian Paul2009-10-221-2/+15
* i965: fix hacked Fallback usage in brw_prepare_vertices()Brian Paul2009-10-222-2/+6
* intel: define INTEL_FALLBACK_DRIVER for driversBrian Paul2009-10-221-0/+1
* intel: Fallback field is a bitmask, use GLbitfieldBrian Paul2009-10-223-5/+14
* i965: remove unused brw_context::tmp_fallback fieldBrian Paul2009-10-221-1/+0
* i965: remove unused BRW_FALLBACK_TEXTURE bitBrian Paul2009-10-221-1/+1
* r600: set barrier for tex inst if dst is used earlier, might overwrite it oth...Andre Maasikas2009-10-221-2/+25
* r600: need to export something from PSAndre Maasikas2009-10-222-2/+19
* r600: add beginnings of ARL instructionAndre Maasikas2009-10-222-3/+33
* r300: fix texture size handling with size > 2048Mathias Fröhlich2009-10-191-6/+14
* r600: Fix size calculation for 24 bit depthRobert Noland2009-10-191-2/+6
* r300: fix vertex program parameters limitsMaciej Cencora2009-10-161-7/+5
* Use the right pitch when rendering to a textureOwen Taylor2009-10-151-2/+3
* r600: FRAG_ATTRIB_WPOS and FRAG_ATTRIB_FOGC appear to be supported.Robert Noland2009-10-151-1/+12
* r600: cleanup in r600_cs_process_relocs().Robert Noland2009-10-151-15/+3
* radeon: return EINVAL for 0 length buffers.Robert Noland2009-10-151-0/+4
* r600: fix tfp1 bo sizeAndre Maasikas2009-10-151-2/+6
* r600: implement ProgramStringNotifyAndre Maasikas2009-10-151-17/+38
* r600: LIT dst.y gets value from src.xAndre Maasikas2009-10-151-0/+1
* r600: DPH adds w comp of second operand, so set first one to 1 insteadAndre Maasikas2009-10-151-1/+1
* r600: fixup KIL instruction a bitAndre Maasikas2009-10-151-18/+9
* r600: use CB_TARGET_MASK instead of CB_SHADER_MASK for setting color maskAndre Maasikas2009-10-151-3/+3
* r600: user correct alpha blend factorAndre Maasikas2009-10-151-2/+2
* r600: clear position enable bit when when wpos is not used by FPAndre Maasikas2009-10-151-0/+5
* i965: Fix the last valid address setting for the index buffer.Eric Anholt2009-10-111-1/+1
* i965: Fix the bounds emitted in the vertex buffer packets.Eric Anholt2009-10-111-2/+2
* radeon: fix scissor regressionAlex Deucher2009-10-092-8/+11
* intel: use driReadDrawable in do_copy_texsubimage()Brian Paul2009-10-051-1/+1
* intel: use driReadDrawable, not driDrawable in do_blit_readpixels()Brian Paul2009-10-051-2/+2
* intel: remove a buffer equality test in _mesa_make_current()Brian Paul2009-10-051-33/+27
* r200: remove subpixel offset from viewportFrederic Crozat2009-10-041-11/+4
* r300: Workaround problem on R500 with very large fragment programsNicolai Hähnle2009-10-032-5/+28
* i965: Fix massive memory allocation for streaming texture usage.Eric Anholt2009-09-303-0/+66
* Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul2009-09-281-1/+4
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| * i915: Fix GetBufferSubData in the case of a system-memory BO.mesa_7_5_2_rc1Eric Anholt2009-09-241-1/+4
| * intel: Mark the FBO as incomplete if there's no intel_renderbuffer for it.Eric Anholt2009-09-211-0/+5
* | intel: Handle GL_RGB8 for glCopyTex(Sub)Image.Michel Dänzer2009-09-251-0/+1
* | intel: Flush the batch when we're about to subdata into a VBO.mesa_7_6_rc1Eric Anholt2009-09-242-2/+5
* | i965: Clean up some mess with the batch cache.Eric Anholt2009-09-243-18/+5
* | i965: Emit zero initialization for NV VP temporaries as required.Eric Anholt2009-09-241-0/+1
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