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* i965/vec4: Rewrite dead code elimination to use live in/out.Matt Turner2014-12-013-155/+170
| | | | | | | | | | | | | | | Improves 359 shaders by >=10% 114 shaders by >=20% 91 shaders by >=30% 82 shaders by >=40% 22 shaders by >=50% 4 shaders by >=60% 2 shaders by >=80% total instructions in shared programs: 5845346 -> 5822422 (-0.39%) instructions in affected programs: 364979 -> 342055 (-6.28%) Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Track liveness of the flag register.Matt Turner2014-12-012-0/+33
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Remove opt_drop_redundant_mov_to_flags().Matt Turner2014-12-012-32/+0
| | | | | | Dead code elimination now handles this. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Use const fs_reg & rather than a copy or pointer.Matt Turner2014-12-014-18/+17
| | | | | | Also while we're touching var_from_reg, just make it an inline function. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Dead code eliminate instructions writing the flag.Matt Turner2014-12-011-4/+22
| | | | | | | | | Most prominently helps Natural Selection 2, which has a surprising number shaders that do very complicated things before drawing black. instructions in affected programs: 21052 -> 16978 (-19.35%) Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Track liveness of the flag register.Matt Turner2014-12-012-0/+41
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Use local pointer to block_data in live intervals.Matt Turner2014-12-015-49/+61
| | | | | | | The next patch will be simplified because of this, and makes reading the code a lot easier. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Make live_intervals part of the vec4_visitor class.Matt Turner2014-12-013-11/+11
| | | | | | Like in fs_visitor. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Treat the FB_WRITE as predicated if we're discarding.Matt Turner2014-12-012-1/+5
| | | | | | | | Pre-Haswell hardware couldn't actually predicate it, but it's easier to pretend as if it's predicated in the visitor since it will generate a MOV from f0.1. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Don't treat IF or WHILE with cmod as writing the flag.Matt Turner2014-12-012-2/+6
| | | | | | | Sandybridge's IF and WHILE instructions can do an embedded comparison with conditional mod. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/disasm: Disassemble tdr and tm registers properly.Matt Turner2014-12-011-0/+6
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: avoid anonymous struct in float <-> VF conversionsJonathan Gray2014-12-011-8/+8
| | | | | | | | | | | Anonymous structures are only supported with newer versions of GCC. They will not work with GCC 4.2.1 used by OpenBSD or GCC 4.4.7 shipped with RHEL6 going by a commit to fix a similiar problem in radeonsi earlier in the year (74388dd24bc7fdb9e62ec18096163f5426e03fbf). Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Jonathan Gray <[email protected]>
* i965/fs: Clean up some whitespace in reg_allocate.Matt Turner2014-12-011-2/+2
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Initialize INTEL_DEBUG once per process.Matt Turner2014-12-011-1/+4
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Initialize compaction tables once per process.Matt Turner2014-12-011-0/+5
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Add _CACHE_ in brw_cache_id enum names.Kenneth Graunke2014-11-2910-43/+43
| | | | | | | | | | | | BRW_CACHE_VS_PROG is more easily associated with program caches than plain BRW_VS_PROG. While we're at it, rename BRW_WM_PROG to BRW_CACHE_FS_PROG, to move away from the outdated Windowizer/Masker name. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Move CACHE_NEW_SAMPLER to BRW_NEW_SAMPLER_STATE_TABLE.Kenneth Graunke2014-11-296-11/+12
| | | | | | | | | | | | | | | | | | | This flag signifies that we've emitted a new SAMPLER_STATE table. Given that we haven't cached those in years, CACHE_NEW_SAMPLER isn't a great name. Putting it in the BRW_NEW_* hierarchy would make more sense; BRW_NEW_SAMPLER_STATE_TABLE better reflects its actual purpose. When this flag is raised, the pointer to the SAMPLER_STATE table has changed, so we need to re-issue any packets which point to it (unit state on Gen4-5, 3DSTATE_SAMPLER_STATE_POINTERS on Gen6, and the per-stage variants on Gen7+). Saves 2 * sizeof(void *) bytes per context, as we remove useless aux_compare/aux_free function pointers. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Move some /* CACHE_NEW_SAMPLER */ comments.Kenneth Graunke2014-11-292-3/+2
| | | | | | | | | | | | | | | | | | | | | | Marking brw_stage_state::sampler_count as CACHE_NEW_SAMPLER is wrong. The number of samplers used by each program is actually computed at draw time (brw_try_draw_prims), based purely on the currently bound shader programs (gl_program::SamplersUsed). CACHE_NEW_SAMPLER means that we've emitted a new SAMPLER_STATE table. Although this could indicate that the number of samplers has changed, it could also simply mean that the contents of the table has changed (i.e. we've bound different textures). The real reason these atoms depend on CACHE_NEW_SAMPLER is because they include a pointer to the SAMPLER_STATE table. This was not commented. So, move the comments to the appropriate place. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Move CACHE_NEW_*_VP flags to BRW_NEW_*_VP.Kenneth Graunke2014-11-295-21/+23
| | | | | | | | | | | | We've been streaming these out for ages, so they basically have nothing to do with brw_state_cache.c. Saves 6 * sizeof(void *) bytes per context, as we won't have useless aux_compare/aux_free functions for them. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Fold the gen7_cc_viewport_state_pointer atom into brw_cc_vp.Kenneth Graunke2014-11-294-23/+8
| | | | | | | | | These always happen together; the extra atom just means another item to iterate through, flags to check, and a call through a function pointer. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Combine CACHE_NEW_*_UNIT into BRW_NEW_GEN4_UNIT_STATE.Kenneth Graunke2014-11-299-31/+11
| | | | | | | | | | | | | | | | | | | | | On Gen4-5, unit state is specified as indirect state, rather than commands. If any unit state changes, we upload it via brw_state_batch and arrange for 3DSTATE_PIPELINED_POINTERS to be re-emitted, which updates pointers to all unit state at once. Since there's only one command and state atom (brw_psp_urb_cs) that needs to know about this, there's no benefit to having six separate flags. We can combine CACHE_NEW_*_UNIT into a single flag. We also haven't cached these in a long time, so it doesn't make sense to use the "CACHE_NEW_" prefix. Instead, use the "BRW_NEW_" prefix. This also saves 12 * sizeof(void *) bytes of memory per context, as we remove useless aux_compare/aux_free functions for each CACHE bit. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Alphabetize brw_tracked_state flags and use a consistent style.Kenneth Graunke2014-11-2952-283/+359
| | | | | | | | | | | | | | | | Most of the dirty flags were listed in some arbitrary order. Some used bonus parenthesis. Some put multiple flags on one line, others put one per line. Some used tabs instead of spaces...but only on some lines. This patch settles on one flag per line, in alphabetical order, using spaces instead of tabs, and sheds the unnecessary parentheses. Sorting was mostly done with vim's visual block feature and !sort, although I alphabetized short lists by hand; it was pretty manual. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Set prog_data->uses_kill if simulating alpha test via discards.Kenneth Graunke2014-11-273-3/+6
| | | | | | | | | | | | | | When using MRT on Gen4-5, we have to simulate GL's alpha test feature by emitting discards in the fragment shader. In this case, it makes sense to set prog_data->uses_kill, which means the fragment shader may kill pixels via the discard mechanism. This saves us from having to look an extra key value in a couple of places, including in the generator. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Use brw_wm_prog_data::uses_kill, not gl_fragment_program::UsesKillKenneth Graunke2014-11-275-6/+7
| | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Pass key->render_to_fbo via src1 of FS_OPCODE_DDY_*.Kenneth Graunke2014-11-273-11/+10
| | | | | | | | | This means the generator doesn't have to look at the key, which is a little nicer - we're pretty close to no key dependencies at all. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Handle derivative quality decisions in the front-end.Kenneth Graunke2014-11-275-52/+51
| | | | | | | | | | | | | | | | | | | | | Kristian noted that there's very little use of brw_wm_prog_key in the generator, and that it basically just generates what it's told, without caring about what stage it's handling. One exception to this is derivative handling. When handling dFdxCoarse and dFdxFine, we packed an enum value in a second source register, explicitly telling the generator what to do. For dFdx, we specified an enum value of "please use the hint", then checked the program key in the generator level code. A natural method is to define separate FS_OPCODE_DD[XY]_{COARSE,FINE} opcodes, and have the front-end (which already decides what IR to generate based on the program key) decide which dPdx/dPdy should correspond to. This consolidates the decision making in one place. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Create prog_data temporary variables in PS state upload code.Kenneth Graunke2014-11-274-77/+81
| | | | | | | | | prog_data->foo is a bit more readable than brw->wm.prog_data->foo. The local variable definition is also a great location to put the obligatory /* CACHE_NEW_WM_PROG */ comment. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Fix missing CACHE_NEW_WM_PROG in 3DSTATE_PS_EXTRA.Kenneth Graunke2014-11-271-2/+2
| | | | | | | | | | | | brw->wm.prog_data is covered by CACHE_NEW_WM_PROG, not BRW_NEW_FRAGMENT_PROGRAM. So, we should listen to it. However, I believe that BRW_NEW_FRAGMENT_PROGRAM is sufficient to cover all the necessary cases - CACHE_NEW_WM_PROG happens in a subset of cases. So, the code being wrong shouldn't have triggered bugs. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/vec4: Handle destination writemasks in VEC4_OPCODE_PACK_BYTES.Matt Turner2014-11-251-2/+13
| | | | | | | | | | | | | | Since pack_bytes expands to two mov(4) align1 instructions, we can't use swizzles directly. For an instruction like pack_bytes m4.y:UD, vgrf13.xyzw:UD we can write into the .y component by settings the offset based on the swizzle. Also while we're doing this, we can set the dependency control hints properly, so that a series of pack_bytes writing into separate components of a register can issue without blocking.
* i965/vec4: Optimize packSnorm4x8().Matt Turner2014-11-253-4/+29
| | | | | Reduces the number of instructions needed to implement packSnorm4x8() from 13 -> 7.
* i965/vec4: Optimize packUnorm4x8().Matt Turner2014-11-253-4/+27
| | | | | Reduces the number of instructions needed to implement packUnorm4x8() from 11 -> 6.
* i965/vec4: Add VEC4_OPCODE_PACK_4_BYTES.Matt Turner2014-11-254-0/+52
| | | | Will be used by emit_pack_{s,u}norm_4x8().
* i965/vec4: Optimize unpackSnorm4x8().Matt Turner2014-11-253-3/+33
| | | | | | | Reduces the number of instructions needed to implement unpackSnorm4x8() from 16 -> 6. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Optimize unpackUnorm4x8().Matt Turner2014-11-253-3/+31
| | | | | | | Reduces the number of instructions needed to implement unpackUnorm4x8() from 11 -> 4. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Add vector float immediate infrastructure.Matt Turner2014-11-253-0/+23
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add vector float immediate infrastructure.Matt Turner2014-11-253-0/+24
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Disassemble vector float immediates properly.Matt Turner2014-11-251-1/+5
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: Add unit test for float <-> VF conversions.Matt Turner2014-11-252-0/+105
| | | | | Using Eric's original VF -> float conversion code to initialize the table.
* i965: Add functions to convert float <-> VF.Matt Turner2014-11-253-0/+80
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/Gen6-7: Do not replace texcoords with point coord if not drawing pointsChris Forbes2014-11-252-12/+49
| | | | | | | | | | | | | | | | | | | | | | Fixes broken rendering in Windows-based QtQuick2 apps run through Wine. This library sets all texture units' GL_COORD_REPLACE, leaves point sprite mode enabled, and then draws a triangle fan. Will need a slightly different fix for Gen4-5, but I don't have my old machines in a usable state currently. V2: - Simplify patch -- the real changes are no longer duplicated across the Gen6 and Gen7 atoms. - Also don't clobber attr overrides -- which matters on Haswell too, and fixes the other half of the problem - Fix newly-introduced warnings V3: - Use BRW_NEW_GEOMETRY_PROGRAM and brw->geometry_program rather than core flag and state; keep the state flags in order. Signed-off-by: Chris Forbes <[email protected]> Cc: "10.4" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84651 Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Precompile ARB programs.Kenneth Graunke2014-11-241-2/+9
| | | | | | | | | | | | We already precompile GLSL programs; it seems logical to precompile ARB programs as well. We just never hooked it up. This also makes the programs compile even if no drawing occurs, which is useful for shader-db. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Make precompile functions accessible from C.Kenneth Graunke2014-11-245-10/+19
| | | | | | | | | | | | | Previously, the prototypes for brw_vs/gs/fs_precompile were scattered between brw_vs.h (C), brw_gs.h (C), and brw_fs.h (C++ only). Also, brw_fs_precompile had C++ linkage, while the others were C. This patch moves all the prototypes to a central location (brw_shader.h) and makes brw_fs_precompile have C linkage. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Pass gl_program pointers into precompile functions.Kenneth Graunke2014-11-247-29/+33
| | | | | | | | | | | | We'd like to do precompiling for ARB vertex and fragment programs, which only have gl_program structures - gl_shader_program is NULL. This patch makes the various precompile functions take a gl_program parameter directly, rather than accessing it via gl_shader_program. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Move brw->precompile checks out a level.Kenneth Graunke2014-11-241-4/+4
| | | | | | | | | brw_shader_precompile should just do a precompile; it makes more sense for the caller to decide whether we should do one. Simpler. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/gen6/gs: Don't declare a src_reg with struct.Matt Turner2014-11-241-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/disasm: Fix all32h/any32h predicate disassembly.Matt Turner2014-11-241-1/+1
| | | | Reviewed-by: Chris Forbes <[email protected]>
* i965: Don't overwrite the math function with conditional mod.Matt Turner2014-11-242-2/+4
| | | | | | | | | | | | | | | Ben was asking about the undocumented restriction that the math instruction cannot use the dependency control hints. I went to reconfirm and disabled the is_math() check in opt_set_dependency_control() and saw that the disassembled math instructions with dependency hints had a bogus math function. We were mistakenly overwriting it by setting an empty conditional mod. Unfortunately, this wasn't the cause of the aforementioned problem (I reproduced it). This bug is benign, since we don't set dependeny hints on math instructions -- but maybe some day. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Assert that math instructions don't have conditional mod.Matt Turner2014-11-242-0/+4
| | | | | | The math function field is at the same location as conditional mod. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Handle nested uniform array indexingChris Forbes2014-11-241-29/+37
| | | | | | | | | | | | | | | | | | | When converting a uniform array reference to a pull constant load, the `reladdr` expression itself may have its own `reladdr`, arbitrarily deeply. This arises from expressions like: a[b[x]] where a, b are uniform arrays (or lowered const arrays), and x is not a constant. Just iterate the lowering to pull constants until we stop seeing these nested. For most shaders, there will be only one pass through this loop. Fixes the piglit test: tests/spec/glsl-1.20/linker/double-indirect-1.shader_test Signed-off-by: Chris Forbes <[email protected]> Cc: "10.3 10.4" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make Gen4-5 push constants call _mesa_load_state_parameters too.Kenneth Graunke2014-11-211-0/+4
| | | | | | | | | | | | | | | | | | In commit 5e37a2a4a8a, I made the pull constant code stop calling _mesa_load_state_parameters() when there were no pull parameters. This worked fine on Gen6+ because the push constant code also called it if there were any push constants. However, the Gen4-5 push constant code wasn't doing this. This patch makes it do so, like the Gen6+ code. A better long term solution would be to make core Mesa just handle this for us when necessary. Fixes around 8766 Piglit tests on Ironlake, and probably Gen4 as well. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Tested-by: Mark Janes <[email protected]>
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