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* Revert "dri/radeon: export a function to cleanup a texture object."Dave Airlie2009-02-173-17/+4
| | | | This reverts commit 5325f8624093bb1ec30d581b4ff64218ceab99f9.
* radeon/r200: drop legacy texture heap codeDave Airlie2009-02-173-107/+0
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* radeon/r200: fixup texturing aging callsDave Airlie2009-02-172-6/+4
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* radeon: fixup destroy texture object exit path and update LRUDave Airlie2009-02-171-3/+10
| | | | | the destroy path was doing bad things with structure names, make it do less bad things, use container_of instead
* radeon: remove leftover debugDave Airlie2009-02-171-1/+0
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* radeon/r200: drop dirty state from texture object + pp_txoffsetDave Airlie2009-02-177-58/+10
| | | | this is just more code cleanup for old dead code
* r200: align with r100 codeDave Airlie2009-02-171-3/+2
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* radeon: fix not emitting texture state correctlyDave Airlie2009-02-171-0/+2
| | | | | this is whole texture dirty bit is probably not needed with the current codebase, need to revisit
* radeon: steal miptree optimisation from intel codebaseDave Airlie2009-02-171-0/+10
| | | | This replaces a miptree if it won't distrub anything else.
* radeon: move YUV on first texunit check after hw state is setupDave Airlie2009-02-171-5/+4
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* dri/radeon: export a function to cleanup a texture object.Dave Airlie2009-02-173-4/+17
| | | | | The radeon legacy code want to cleanup not free the texture obj, so export a function to do that and wrap it.
* radeon: fix texcompress2 test.Dave Airlie2009-02-161-34/+53
| | | | this makes compressed subimages work properly.
* radeon: fix compressed tex subimage unpack parameterDave Airlie2009-02-161-1/+1
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* radeon: add cflags to decide whether to link libdrm_radeon or not.Dave Airlie2009-02-153-3/+9
| | | | | You don't need libdrm_radeon for the legacy driver to build, only for the experimental mm/cs paths.
* radeon-common: Fix crash in glGetTexImageNicolai Haehnle2009-02-145-0/+69
| | | | | | | | | | | | Since texture images are now stored in miptrees, we cannot usually access them directly via the Data pointer. So we wrap Mesa's implementation by map/unmap calls. This crash was triggered by Sauerbraten, Piglit now contains a regression test. Signed-off-by: Nicolai Haehnle <[email protected]>
* r300: Fix crash in cubemap tree creationNicolai Haehnle2009-02-141-6/+20
| | | | | | | | | The mip tree creation would crash if the first baselevel image to be uploaded was not the positive-x image. Found with Sauerbraten, also added a regression test to Piglit. Signed-off-by: Nicolai Haehnle <[email protected]>
* r300: Redirect constant TEX coordinatesNicolai Haehnle2009-02-142-0/+32
| | | | | | | | | | | | | R3xx/R5xx fragment program texture constants must come from a hardware register instead of the constant file, so we redirect if necessary during the native rewrite phase. The symptoms of this bug started appearing when the Mesa fixed function texenvprogram code started using STATE_CURRENT_ATTRIB constants for texture coordinates when the corresponding attributes were constant across all vertices. Signed-off-by: Nicolai Haehnle <[email protected]>
* r300: Fix R300_CMD_SCRATCH on big endian.Michel Dänzer2009-02-142-2/+11
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* radeon: remove unused radeon_compat.cDave Airlie2009-02-141-301/+0
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* r200: fixup cube emit debugDave Airlie2009-02-141-2/+1
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* r200: fix another cmdbuf sizing issueDave Airlie2009-02-141-1/+1
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* radeon: check for valid bo in release arraysDave Airlie2009-02-141-2/+4
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* radeon: remove old cube codeDave Airlie2009-02-141-12/+1
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* radeon/r300: fix warningsDave Airlie2009-02-143-3/+4
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* radeon: add initial cubemap support appears to workDave Airlie2009-02-141-1/+39
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* radeon/r200: make setTexOffset work againDave Airlie2009-02-134-6/+8
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* radeon/r200: fix set tex offset functionsDave Airlie2009-02-132-6/+2
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* radeon: revert unneeded change to texturing codeDave Airlie2009-02-131-3/+8
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* radeon: fix compressed texture upload on all radeonsDave Airlie2009-02-132-22/+75
| | | | tested on r200, texcmp works. May need more verification
* r200: update with changes from r100 driver for texture stateDave Airlie2009-02-131-2/+44
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* r200: port over state emit fix from r100Dave Airlie2009-02-131-2/+4
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* r200: fixup some CS emission sizesDave Airlie2009-02-133-2/+3
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* r200: use correct finish interfaceDave Airlie2009-02-135-6/+4
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* radeon: fixup include orderingDave Airlie2009-02-132-4/+4
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* Merge remote branch 'origin/master' into radeon-rewriteDave Airlie2009-02-13141-4136/+5264
|\ | | | | | | | | | | | | Conflicts: configure.ac src/mesa/drivers/dri/r200/r200_context.c src/mesa/drivers/dri/r300/r300_render.c
| * Fix an i965 assertion failure on glClear()Robert Ellison2009-02-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While running conform with render-to-texture: conform -d 33 -v 2 -t -direct the i965 driver failed this assertion: intel_clear.c:77: intel_clear_tris: Assertion `(mask & ~((1 << BUFFER_BACK_LEFT) | (1 << BUFFER_FRONT_LEFT) | (1 << BUFFER_DEPTH) | (1 << BUFFER_STENCIL))) == 0' failed. The problem is that intel_clear_tris() is called by intelClear() to clear any and all of the available color buffers, but intel_clear_tris() actually only handles the back left and front left color buffers; so the assertion fails as soon as you try to clear a non-standard color buffer. The fix is to have intelClear() only call intel_clear_tris() with buffers that intel_clear_tris() can support. intelClear() already backs down to _swrast_Clear() for all buffers that aren't handled explicitly.
| * intel: Add x8r8g8b8 visuals to DRI1 fbconfigs alongside a8r8gb8.Eric Anholt2009-02-105-42/+54
| | | | | | | | | | This involved fixing driConcatConfigs to not return const (which had made a mess of a previous patch too).
| * sis: fix signedness warningsEric Anholt2009-02-102-5/+5
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| * trident: Fix signedness warning.Eric Anholt2009-02-101-1/+1
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| * tdfx: Fix begin/endquery for current API.Eric Anholt2009-02-101-4/+4
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| * intel: Don't do the extra MI_FLUSH in flushing except when doing glFlush().Eric Anholt2009-02-101-5/+17
| | | | | | | | | | Everything other than "make sure the last rendering ends up visible on the screen" doesn't need that behavior.
| * intel: Speed up glDrawPixels(GL_ALPHA) by using an alpha texture format.Eric Anholt2009-02-101-5/+6
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| * intel: Fix some state leakage of {Client,}ActiveTexture in metaops.Eric Anholt2009-02-102-0/+10
| | | | | | | | Found while debugging cairo-gl.
| * intel: don't crash when dri2 tells us about buffers we don't care about.Eric Anholt2009-02-101-0/+3
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| * Merge commit 'origin/gallium-master-merge'Brian Paul2009-02-1018-126/+272
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the big merge of the gallium-0.2 branch into master. gallium-master-merge was just the staging area for it. Both gallium-0.2 and gallium-master-merge are considered closed now. Conflicts: progs/demos/Makefile src/mesa/main/state.c src/mesa/main/texenvprogram.c
| | * gallium: Fixups for driCreateConfigs MSAA support.Michel Dänzer2009-02-1012-3/+28
| | | | | | | | | | | | Add the MSAA samples array or make sure its contents are initialized.
| | * re-add MSAA supportBrian Paul2009-02-0911-34/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | (cherry picked from commit f7d80aa00611917bc8ce637136d982b151b8f44f) This also involved adding the new MSAA fields to driCreateConfigs(). Also, re-add prog_instructions->Sampler field for i965 driver. Will have to revisit that.
| | * mesa: merge gallium-0.2 into gallium-master-mergeBrian Paul2009-02-096-91/+190
| | |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge commit 'origin/gallium-0.2' into gallium-master-merge Conflicts: Makefile docs/relnotes-7.4.html docs/relnotes.html src/mesa/drivers/dri/i965/brw_wm.h src/mesa/main/imports.c src/mesa/main/mtypes.h src/mesa/main/texcompress.c src/mesa/main/texenvprogram.c src/mesa/main/version.h src/mesa/vbo/vbo_exec_api.c src/mesa/vbo/vbo_save_draw.c
| | | * i965: fix bug in pass0_precalc_mov()Brian Paul2009-01-291-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, "in-place" swizzles such as: MOV t, t.xxyx; were handled incorrectly. Fixed by splitting the one loop into two loops so we get all the refs before assigning them (to avoid potential clobbering). (cherry picked from master/commit faa48915d27634a12f123eaa6e954ec79565e365)
| | | * i965: widen per-texture bitfields for 16 texture image unitsBrian Paul2009-01-291-5/+5
| | | | | | | | | | | | | | | | (cherry picked from master/commit f78c388b6c156cb155f089b00612f00919090a8e)
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