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* i965: Prepare up/downsampling for isl based miptreesTopi Pohjolainen2017-06-191-8/+38
* i965/miptree: Add isl surfaceTopi Pohjolainen2017-06-191-0/+2
* i965: Add helper for converting isl tiling to bufmgr tilingTopi Pohjolainen2017-06-191-0/+13
* i965/miptree: Refactor mapping table allocTopi Pohjolainen2017-06-191-2/+28
* i965/gen6: Declare minify(depth, level) layers for 3D stencilTopi Pohjolainen2017-06-191-1/+3
* i965/gen4: Add support for single layer in alignment workaroundTopi Pohjolainen2017-06-197-11/+99
* i965/miptree: Separate src and dst slice specifiers in slice copyTopi Pohjolainen2017-06-191-25/+35
* i965/miptree: Clarify face/level/layer in slice copyTopi Pohjolainen2017-06-191-19/+20
* i965: Ignore anisotropic filtering in nearest mode.Kenneth Graunke2017-06-191-2/+4
* i965: update MaxTextureRectSize to match PRMs and comply with OpenGL 4.1+Iago Toral Quiroga2017-06-191-1/+1
* i965/gen4: Refactor depth/stencil rebaseTopi Pohjolainen2017-06-181-180/+63
* i965: Drop depth/stencil miptree pointers in alignment workaroundTopi Pohjolainen2017-06-182-15/+3
* i965/gen4: Simplify depth/stencil invalidate checkTopi Pohjolainen2017-06-181-13/+3
* i965/gen4: Remove redundant check for depth when rebasing stencilTopi Pohjolainen2017-06-181-51/+12
* i965/gen4: Remove non-existing stencil and hiz buffer setupTopi Pohjolainen2017-06-182-117/+14
* i965/gen4: Set depth offset when there is stencil attachment onlyTopi Pohjolainen2017-06-171-0/+6
* i965/gen6: Remove dead code in hiz surface setupTopi Pohjolainen2017-06-171-7/+6
* i965: Convert SF_STATE to genxml.Rafael Antognolli2017-06-165-288/+83
* i965: aa_line_distance_mode should be before the padding.Rafael Antognolli2017-06-161-1/+1
* i965: Mark freshly allocate bo as idleChris Wilson2017-06-161-0/+1
* i965: Improve conditional rendering in fallback paths.Kenneth Graunke2017-06-153-47/+48
* i965: gen4_blorp_exec.h to the sources listEmil Velikov2017-06-152-1/+1
* i965/miptree: Use the new simple alloc_tiled for CCS buffersJason Ekstrand2017-06-141-7/+2
* i965/bufmgr: Add a new, simpler, bo_alloc_tiledJason Ekstrand2017-06-142-0/+26
* i965/bufmgr: Rename bo_alloc_tiled to bo_alloc_tiled_2dJason Ekstrand2017-06-144-44/+44
* i965: Use blorp for depth/stencil clears on gen6+Jason Ekstrand2017-06-143-0/+115
* i965: Set step_rate = 0 for interleaved vertex buffersJason Ekstrand2017-06-141-0/+1
* i965: Disable the interleaved vertex optimization when instancingJason Ekstrand2017-06-141-5/+6
* i965/blorp: Set no_depth_or_stencil correctlyJason Ekstrand2017-06-141-1/+2
* i965: Remove some unneeded fields from brw_contextJason Ekstrand2017-06-141-12/+0
* i965: Remove some of the remnants of metaJason Ekstrand2017-06-143-3/+2
* i965/miptree: Choose the stencil layout in miptree_create_layoutJason Ekstrand2017-06-141-2/+4
* i965/blorp: Set aux_usage to NONE for miplevels without HiZJason Ekstrand2017-06-141-0/+6
* i965: Use a line end cap width of 0.5 unless smooth lines enabled.Kenneth Graunke2017-06-141-2/+3
* i965: Use brw_get_line_width() in Gen4-5 SF_STATE code.Kenneth Graunke2017-06-141-4/+2
* i965: Stop using BRW_RASTRULE_LOWER_RIGHT on Gen4-5.Kenneth Graunke2017-06-141-27/+1
* i965: When gl_PointSize is unwritten, default to 1.0 on Gen4-5.Kenneth Graunke2017-06-141-3/+3
* i965: Make Gen4-5 SF_STATE use the point size calculations from Gen6+.Kenneth Graunke2017-06-141-5/+6
* i965: Do an end-of-pipe sync after flushesJason Ekstrand2017-06-141-3/+3
* i965/blorp: Do an end-of-pipe sync around CCS opsJason Ekstrand2017-06-141-12/+4
* i965: Do an end-of-pipe sync prior to STATE_BASE_ADDRESSJason Ekstrand2017-06-141-6/+12
* i965: Add an end-of-pipe sync helperTopi Pohjolainen2017-06-142-1/+100
* i965: Unify the two emit_pipe_control functionsJason Ekstrand2017-06-141-73/+64
* i965: Take a uint64_t immediate in emit_pipe_control_writeJason Ekstrand2017-06-144-17/+14
* i965: Flush around state base addressJason Ekstrand2017-06-142-1/+33
* i965: Print "force dual color blending" in FS recompile debug output.Kenneth Graunke2017-06-141-0/+3
* i915: Fix wpos_tex vs. -1 comparisonVille Syrjälä2017-06-143-3/+4
* i965: fix missing breakLionel Landwerlin2017-06-121-0/+1
* i965: include gen4_blorp_exec.h into EXTRA_DISTJuan A. Suarez Romero2017-06-121-0/+1
* i965: Call intel_prepare_render() from intel_update_state()Kenneth Graunke2017-06-121-0/+2
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