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Commit message (
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Author
Age
Files
Lines
*
meta/blit: Use internal functions for sampler object access
Ian Romanick
2016-01-11
1
-2
/
+2
*
i965: Upload 3DSTATE_BINDING_TABLE_POINTERS_HS when !TCS on Gen9+.
Kenneth Graunke
2016-01-11
1
-3
/
+4
*
Add missing platform information for KBL
Mark Janes
2016-01-11
1
-0
/
+5
*
glsl: Move _mesa_shader_stage_to_string/abbrev to shader_enums.c
Kristian Høgsberg Kristensen
2016-01-08
4
-4
/
+0
*
i965: Move GLSL lowering passes out of libi965_compiler.la
Kristian Høgsberg Kristensen
2016-01-08
1
-5
/
+5
*
i965/compiler: Enable more lowering in NIR
Jason Ekstrand
2016-01-07
1
-0
/
+7
*
i965: use _mesa_delete_buffer_object
Nicolai Hähnle
2016-01-07
1
-1
/
+1
*
i915: use _mesa_delete_buffer_object
Nicolai Hähnle
2016-01-07
1
-1
/
+1
*
radeon: use _mesa_delete_buffer_object
Nicolai Hähnle
2016-01-07
1
-1
/
+1
*
mesa: Add KBL PCI IDs and platform information.
Sarah Sharp
2016-01-06
1
-0
/
+60
*
nir: Add a lower_fdiv option, turn fdiv into fmul/frcp.
Kenneth Graunke
2016-01-05
1
-0
/
+1
*
i965: Only turn on ARB_compute_shader if we can write registers.
Kenneth Graunke
2016-01-05
1
-2
/
+3
*
i965: Use rcp in brw_lower_texture_gradients rather than 1.0 / x.
Kenneth Graunke
2016-01-05
1
-1
/
+1
*
i965/gen9: Modify the conditions to use blitter on skl+
Anuj Phogat
2016-01-05
1
-3
/
+9
*
i965/gen9: Return false in place of assert in intelEmitCopyBlit()
Anuj Phogat
2016-01-05
1
-3
/
+4
*
i965/gen9: Remove regions overlap check in fast copy blit
Anuj Phogat
2016-01-05
1
-5
/
+0
*
i965/gen9: Don't use fast copy blit in case of non power of 2 cpp
Anuj Phogat
2016-01-05
1
-2
/
+4
*
i915/i965: Fix typo in perf_debug message
Ian Romanick
2016-01-05
2
-2
/
+2
*
i965: quieten compiler warning about out-of-bounds access
Ilia Mirkin
2016-01-05
1
-0
/
+1
*
i965/wm: use binding size for ubo/ssbo when automatic size is unset
Ilia Mirkin
2016-01-05
1
-4
/
+10
*
Revert "i965/wm: use proper API buffer size for the surfaces."
Ilia Mirkin
2016-01-05
2
-9
/
+4
*
i965/wm: use proper API buffer size for the surfaces.
Samuel Iglesias Gonsálvez
2016-01-04
2
-4
/
+9
*
nouveau: fix double-const qualifier
Ilia Mirkin
2016-01-03
2
-2
/
+2
*
nir: extract out helper macros for running passes
Rob Clark
2016-01-03
1
-36
/
+9
*
i965: Make TCS precompile use the TES primitive mode when available.
Kenneth Graunke
2016-01-02
1
-1
/
+3
*
i965: Push most TES inputs in SIMD8 mode.
Kenneth Graunke
2016-01-02
1
-12
/
+30
*
i965: Use LOAD_PAYLOAD for SIMD8 TES input loads, not MOV.
Kenneth Graunke
2016-01-02
1
-1
/
+4
*
i965: Move 3-src subnr swizzle handling into the vec4 backend.
Kenneth Graunke
2016-01-02
2
-6
/
+18
*
drirc: Disable ARB_blend_func_extended for Heaven 4.0/Valley 1.0.
Kenneth Graunke
2015-12-30
1
-0
/
+8
*
i965/gen8: Always use BRW_REGISTER_TYPE_UW for MUL on GEN8+
Marta Lofstedt
2015-12-30
2
-29
/
+1
*
i965: Reemit vertex state between indirect multi draws
Kristian Høgsberg Kristensen
2015-12-29
1
-2
/
+22
*
i965: Add support for gl_DrawIDARB and enable extension
Kristian Høgsberg Kristensen
2015-12-29
12
-5
/
+145
*
i965: Add support for gl_BaseVertexARB and gl_BaseInstanceARB
Kristian Høgsberg Kristensen
2015-12-29
11
-37
/
+88
*
i965: Assert that SYSTEM_VALUE_VERTEX_ID gets lowered
Kristian Høgsberg Kristensen
2015-12-29
1
-0
/
+1
*
i965: Enable ARB_tessellation_shader on Gen7-7.5.
Kenneth Graunke
2015-12-28
2
-3
/
+3
*
i965: Don't set interleave or complete on TCS EOT message.
Kenneth Graunke
2015-12-28
5
-5
/
+41
*
i965: Relase input URB Handles on Gen7/7.5 when TCS threads finish.
Kenneth Graunke
2015-12-28
5
-1
/
+93
*
i965: Use proper TCS barrier ID bits for Ivybridge/Baytrail.
Kenneth Graunke
2015-12-28
1
-4
/
+6
*
i965: Use proper TCS Instance ID bits for Ivybridge/Baytrail.
Kenneth Graunke
2015-12-28
1
-2
/
+5
*
i965: Port tessellation evaluation shaders to vec4 mode.
Kenneth Graunke
2015-12-28
8
-2
/
+365
*
i965: Emit a real 3DSTATE_DS on Gen7.
Kenneth Graunke
2015-12-28
1
-11
/
+54
*
i965: Emit a real 3DSTATE_HS on Gen7.
Kenneth Graunke
2015-12-28
1
-11
/
+47
*
i965: Add the TCS/TES state upload atoms to the gen7_atoms list.
Kenneth Graunke
2015-12-28
3
-30
/
+14
*
nir: Get rid of function overloads
Jason Ekstrand
2015-12-28
5
-47
/
+48
*
i965: Add tr_mode and mip tail information in surface state dump
Anuj Phogat
2015-12-23
1
-2
/
+5
*
i965/gen8/cs: Gen8 requires 64 byte alignment for push constant data
Jordan Justen
2015-12-22
1
-3
/
+3
*
i965: Enable ARB_tessellation_shader on Gen8+.
Kenneth Graunke
2015-12-22
1
-0
/
+1
*
i965: Handle mix-and-match TCS/TES with separate shader objects.
Kenneth Graunke
2015-12-22
8
-24
/
+87
*
i965: Defer input lowering for tessellation stages until specialization.
Kenneth Graunke
2015-12-22
4
-27
/
+22
*
i965: Automatically create a passthrough TCS when needed.
Kenneth Graunke
2015-12-22
3
-12
/
+113
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