summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri
Commit message (Expand)AuthorAgeFilesLines
* i965: Move compute shader code aroundKristian Høgsberg Kristensen2015-09-145-333/+362
* i965/vec4_nir: Load constants as integersAntia Puentes2015-09-141-2/+2
* i965/vec4: Fix saturation errors when coalescing registersAntia Puentes2015-09-141-0/+21
* i965/nir: Support gl_WorkGroupID variableJordan Justen2015-09-131-1/+9
* i965/cs: Initialize gl_WorkGroupID variable from payloadJordan Justen2015-09-132-0/+20
* i965/nir: Support gl_LocalInvocationID variableJordan Justen2015-09-131-0/+17
* i965/cs: Initialize gl_LocalInvocationID from payloadJordan Justen2015-09-132-2/+24
* i965/cs: Initialize gl_LocalInvocationID in push constant dataJordan Justen2015-09-131-4/+52
* i965/cs: Reserve local invocation id in payload regsJordan Justen2015-09-134-0/+45
* i965/vec4: Don't reswizzle hardware registersJason Ekstrand2015-09-121-0/+8
* i965/emit: Add assertions for accumulator restrictionsJason Ekstrand2015-09-121-0/+17
* i965/vec4: check writemask when bailing out at register coalesceAlejandro Piñeiro2015-09-111-4/+6
* i965: Use hash tables for brw_fs_vector_splitting().Kenneth Graunke2015-09-111-22/+22
* i915, i965: Silence unused parameter warnings in intel_batchbuffer_advanceIan Romanick2015-09-102-0/+4
* i915: Silence unused parameter warning in intel_miptree_create_layoutIan Romanick2015-09-103-15/+5
* i915, i965: Silence unused parameter warnings in intel_miptree_unmap_gttIan Romanick2015-09-102-12/+4
* i915: Silence unused parameter warningsIan Romanick2015-09-103-7/+5
* i915: Remove prototype for nonexistent brw_miptree_layoutIan Romanick2015-09-101-2/+0
* i965: Make intel_miptree_map_raw staticIan Romanick2015-09-102-19/+17
* i915, i965: Silence unused parameter warnings in intel_mipmap_tree.hIan Romanick2015-09-102-0/+8
* i965: Silence unused parameter warnings in intel_mipmap_tree.cIan Romanick2015-09-103-11/+9
* i965: Silence unused parameter warnings in intel_fbo.cIan Romanick2015-09-101-3/+8
* i965/cs: Enable barrier in MEDIA_INTERFACE_DESCRIPTORJordan Justen2015-09-104-1/+8
* i965/cs: Emit texture surfaces to enable CS samplingJordan Justen2015-09-102-1/+3
* i965: Set up sampler state for compute shadersJordan Justen2015-09-101-2/+12
* i965/fs: Set first_non_payload_grf in assign_curb_setupJordan Justen2015-09-101-4/+5
* i965: Support compute shaders in is_scalar_shader_stage()Jordan Justen2015-09-101-0/+1
* i965: Support CS in update_stage_texture_surfacesJordan Justen2015-09-101-0/+7
* i965: enable ARB_shader_texture_image_samplesIlia Mirkin2015-09-101-0/+1
* i965: add handling for imageSamplesIlia Mirkin2015-09-101-0/+5
* i965: add support for textureSamples functionIlia Mirkin2015-09-1010-1/+35
* i965: Fix typos in licenseIan Romanick2015-09-1033-66/+66
* i965: Remove horizontal bars from file header commentsIan Romanick2015-09-1031-129/+62
* i965: Resolve GCC sign-compare warning.Rhys Kidd2015-09-104-9/+9
* i965: Advertise 65536 for GL_MAX_UNIFORM_BLOCK_SIZE.Kenneth Graunke2015-09-101-0/+9
* nir/glsl: Use lower_outputs_to_temporaries instead of relying on GLSL IRJason Ekstrand2015-09-091-3/+0
* xmlpool: 'promote' LOCALEDIR variableEmil Velikov2015-09-091-1/+1
* i965/nir: Use nir_system_value_from_intrinsic to reduce duplication.Kenneth Graunke2015-09-082-60/+17
* i965: Mark topologies with adjacency information as G45+.Kenneth Graunke2015-09-081-4/+4
* i965: Fix value of _3DPRIM_TRIFAN_NOSTIPPLE.Kenneth Graunke2015-09-081-1/+1
* i965: Add 64-bit dirty flag handling to brw_upload_pull_constantsChris Forbes2015-09-082-2/+2
* i965: Add defines for all new Gen7/8 URB opcodesChris Forbes2015-09-082-10/+16
* i965/gen8+: Skip depth stalls on state changeBen Widawsky2015-09-081-0/+8
* i965/skl: Use more compact hiz dimensionsBen Widawsky2015-09-081-32/+32
* i965: Disallow fast blit paths for CopyTexImage with PixelTransfer opsChris Wilson2015-09-072-0/+8
* i965/nir/vec4: removed unneeded tex src swizzle setAlejandro Piñeiro2015-09-071-1/+0
* i965: Remove base miplevel from sampler state.Ben Widawsky2015-09-043-6/+1
* i965: Disallow PixelTransfer operations for tiled-memcpy TexImage/ReadPixelsChris Wilson2015-09-042-0/+8
* i965/vec4: Don't unspill the same register in consecutive instructionsIago Toral Quiroga2015-09-041-8/+118
* i965: Add a debug option for spilling everything in vec4 codeIago Toral Quiroga2015-09-044-5/+7
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 03:06:48 +0000