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* Merge branch 'mesa_7_6_branch'Brian Paul2009-09-095-1/+24
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| * Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul2009-09-095-1/+24
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| | * i965: fix incorrect test for vertex position attributeBrian Paul2009-09-083-1/+4
| | * i965: Fix warnings in intel_pixel_read.c.Eric Anholt2009-09-041-0/+4
| | * intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt2009-09-044-1/+29
| | * intel: Update Mesa state before span setup in glReadPixels.Eric Anholt2009-09-043-3/+13
| | * intel: Move intel_pixel_read.c to shared for use with i965.Eric Anholt2009-09-042-306/+307
| | * i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.Eric Anholt2009-09-041-2/+4
| | * intel: Align cubemap texture height to its padding requirements.Eric Anholt2009-09-041-0/+10
| | * intel: Align untiled region height to 2 according to 965 docs.Eric Anholt2009-09-041-0/+7
| | * i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt2009-09-043-1/+5
| | * i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt2009-09-041-1/+21
| | * i965: asst clean-ups, etc in brw_vs_emit()Brian Paul2009-09-041-11/+10
| | * i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt2009-09-041-0/+13
| | * i965: Spell "conditional" correctly.Eric Anholt2009-09-043-15/+15
| | * i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt2009-09-041-1/+5
| | * i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt2009-09-041-0/+14
| | * i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt2009-09-041-0/+11
| | * i965: Make sure the VS URB size is big enough to fit a VF VUE.Eric Anholt2009-09-041-1/+8
| | * i965: Don't emit bad packets when no VBs are referenced.Eric Anholt2009-09-041-0/+22
| | * i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt2009-09-042-29/+18
| | * i965: Set the max index buffer address correctly according to the docs.Eric Anholt2009-09-041-1/+1
| | * i965: rename var: s/tmp/vs_inputs/Brian Paul2009-09-041-8/+8
| | * dri: Fix problems with unitialized values in dri screen object.Pauli Nieminen2009-08-071-1/+1
* | | r600: fix ftp for dri1Alex Deucher2009-09-091-3/+4
* | | intel: add B43 chipset supportZhenyu Wang2009-09-092-1/+6
* | | r600: don't setup hardware state if TFPDave Airlie2009-09-091-0/+4
* | | intel: Add support for ARB_draw_elements_base_vertex.Eric Anholt2009-09-082-1/+3
* | | mesa: Add support for ARB_draw_elements_base_vertex.Eric Anholt2009-09-081-0/+2
* | | glapi: Add ARB_draw_elements_base_vertexEric Anholt2009-09-081-14/+44
* | | mesa: Expose NV_depth_clamp if ARB_depth_clamp is supported.Eric Anholt2009-09-081-0/+1
* | | i965: Add support for ARB_depth_clamp.Eric Anholt2009-09-083-5/+15
* | | mesa: Add support for ARB_depth_clamp.Eric Anholt2009-09-081-0/+1
* | | i965: Respect spec requirement for pixel shader computed depth with no zbuffer.Eric Anholt2009-09-081-0/+7
* | | i965: Set NULL WM surfaces as tiled according to requirement by specs.Eric Anholt2009-09-081-1/+1
* | | i965: Use the renderbuffer surface size instead of region size for WM surfaces.Eric Anholt2009-09-081-2/+7
* | | Revert "intel: helper to debug bufmgr (disabled)"Eric Anholt2009-09-081-4/+0
* | | i965: #include clean-upsBrian Paul2009-09-082-8/+4
* | | intel: #include clean-upsBrian Paul2009-09-082-8/+0
* | | i965: use _mesa_is_bufferobj()Brian Paul2009-09-081-10/+1
* | | i965: use _mesa_is_bufferobj()Brian Paul2009-09-081-3/+4
* | | i965: use _mesa_is_bufferobj()Brian Paul2009-09-081-4/+4
* | | i965: use _mesa_is_bufferobj()Brian Paul2009-09-081-2/+3
* | | r600: fix dri2 clippingAlex Deucher2009-09-081-2/+2
* | | r600: add support for EXT_texture_sRGBAlex Deucher2009-09-042-0/+44
* | | r300: Add support for GL_EXT_provoking_vertexAlex Deucher2009-09-043-4/+12
* | | r600: Add support for GL_EXT_provoking_vertexAlex Deucher2009-09-042-0/+10
* | | i965: Don't set the complete field when there is more VUE yet to come.Eric Anholt2009-09-041-1/+1
* | | i965: Add support for 2 threads in the GS.Eric Anholt2009-09-041-1/+4
* | | i965: Add support for KIL_NV in brw_wm_emit.cEric Anholt2009-09-042-0/+19
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