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* i965/nir: Do lower_io late for fragment shadersJason Ekstrand2016-02-172-1/+4
* Merge remote-tracking branch 'mesa-public/master' into vulkanJason Ekstrand2016-02-1111-38/+55
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| * i965/gs: Pass VerticesIn though prog_dataJason Ekstrand2016-02-113-1/+5
| * i965/fs: Pass usage of depth, W, and sample mask through prog_dataJason Ekstrand2016-02-116-20/+30
| * i965/fs: Refactor setup_payload_gen6 to assume FSJason Ekstrand2016-02-113-15/+15
| * i965: ir: dump floats as %-g rather than %f, so we can see denormalsChris Forbes2016-02-111-1/+1
| * i965/gen7: Require kernel cmd_parser 5 for ARB_compute_shaderJordan Justen2016-02-111-1/+2
| * mesa: call build_program_resource_list inside Driver.LinkShaderMarek Olšák2016-02-111-0/+2
* | Merge remote-tracking branch 'mesa-public/master' into vulkanJason Ekstrand2016-02-1010-77/+85
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| * nir: Remove the const_offset from nir_tex_instrJason Ekstrand2016-02-102-25/+22
| * i965: Make sure we blit a full compressed blockBen Widawsky2016-02-101-0/+14
| * i965/meta: Don't pollute the renderbuffer namespaceIan Romanick2016-02-103-16/+11
| * i965/meta: Use internal functions for renderbuffer accessIan Romanick2016-02-103-11/+8
| * i965/meta: Return struct gl_renderbuffer* from brw_get_rb_for_slice instead o...Ian Romanick2016-02-104-24/+30
| * i965/meta: Use _mesa_CreateRenderbuffers instead of _mesa_GenRenderbuffers an...Ian Romanick2016-02-101-4/+3
| * i965/blorp: Fix hiz ops on MSAA surfacesChris Forbes2016-02-101-2/+8
| * i965/gen8: Remove dead assertionTopi Pohjolainen2016-02-101-6/+0
| * i965: Use constant pointer when checking for compressionTopi Pohjolainen2016-02-102-2/+2
* | Merge commit '85f5c18fef1ff2f19d698f150e23a02acd6f59b9' into vulkanJason Ekstrand2016-02-1010-156/+206
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| * i965/vec4: Drop support for ATTR as an instruction destination.Kenneth Graunke2016-02-091-16/+0
| * i965/vec4/gs: Stop munging the ATTR containing gl_PointSize.Kenneth Graunke2016-02-092-23/+4
| * i965: Apply VS attribute workarounds in NIR.Kenneth Graunke2016-02-098-117/+202
* | Merge remote-tracking branch 'mesa-public/master' into vulkanJason Ekstrand2016-02-0910-56/+93
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| * i965/vec4: Plumb separate surfaces and samplers through from NIRJason Ekstrand2016-02-094-9/+23
| * i965/vec4: Separate the sampler from the surface in generate_texJason Ekstrand2016-02-091-5/+13
| * i965/fs: Plumb separate surfaces and samplers through from NIRJason Ekstrand2016-02-097-22/+46
| * i965/fs: Separate the sampler from the surface in generate_texJason Ekstrand2016-02-092-6/+15
| * i965/fs: Add an enum for keeping track of texture instruciton sourcesJason Ekstrand2016-02-093-44/+72
| * nir: Separate texture from sampler in nir_tex_instrJason Ekstrand2016-02-092-0/+6
| * nir/tex_instr: Rename sampler to textureJason Ekstrand2016-02-092-24/+24
| * i965: Explicitly write the "TR DS Cache Disable" bit at TCS EOT.Kenneth Graunke2016-02-093-3/+6
* | Merge commit '8b0fb1c152fe191768953aa8c77b89034a377f83' into vulkanJason Ekstrand2016-02-0912-27/+63
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| * i965: Use nir_lower_load_const_to_scalar().Kenneth Graunke2016-02-081-0/+4
| * i965: Don't add barrier deps for FB write messages.Kenneth Graunke2016-02-081-3/+4
| * i965: Rename define for the PIPE_CONTROL DC flush bit.Francisco Jerez2016-02-085-6/+6
| * i965: Invalidate state cache before L3 partitioning set-up.Francisco Jerez2016-02-081-0/+1
| * i965: Fix cache pollution race during L3 partitioning set-up.Francisco Jerez2016-02-081-8/+23
| * i965/fs: Don't emit unnecessary SEL instruction from emit_image_atomic().Francisco Jerez2016-02-081-1/+1
| * i965/vec4: Update vec4 unit tests for commit 01dacc83ff.Matt Turner2016-02-083-10/+24
| * dri/common: include debug_output.h to silence warningBrian Paul2016-02-081-0/+1
* | Merge remote-tracking branch 'mesa-public/master' into vulkanJason Ekstrand2016-02-058-15/+45
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| * i965/vec4: don't copy ATTR into 3src instructions with complex swizzlesMatt Turner2016-02-051-4/+10
| * main: Use a derived value for the default sample countNeil Roberts2016-02-051-0/+19
| * DRI_CONFIG: Add option to override vendor idPatrick Rudolph2016-02-041-0/+5
| * i965/fs: Allocate single register at a time for constants.Matt Turner2016-02-041-3/+3
| * i965/gen8: Initialize aux_mode to GEN8_SURFACE_AUX_MODE_NONEJordan Justen2016-02-021-2/+2
| * Revert "i965: Provide sse2 version for rgba8 <-> bgra8 swizzle"Roland Scheidegger2016-02-022-62/+12
| * i965: Provide sse2 version for rgba8 <-> bgra8 swizzleRoland Scheidegger2016-02-022-12/+62
| * i965/gen7+: Use NIR for lowering of pack/unpack opcodes.Matt Turner2016-02-013-19/+29
| * i965/vec4: Implement nir_op_pack_uvec2_to_uint.Matt Turner2016-02-011-0/+18
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