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Author
Age
Files
Lines
*
i965: Abort on gl_FragDepth in the new FS backend for now.
Eric Anholt
2010-08-26
1
-0
/
+1
*
i965: Fix up and actually enable the NewShader and NewShaderProgram hooks.
Eric Anholt
2010-08-26
2
-3
/
+8
*
i965: Hack in avoidance of c++ reserved keyword in libdrm.
Eric Anholt
2010-08-26
1
-0
/
+8
*
i965: Add GLSL IR-level source annotation and comments to new FS debug.
Eric Anholt
2010-08-26
1
-5
/
+83
*
i965: Use the implied move in brw_math() in the new FS.
Eric Anholt
2010-08-26
1
-2
/
+1
*
i965: Add support for in varyings to the new FS codegen.
Eric Anholt
2010-08-26
1
-55
/
+390
*
i965: Start building the codegen visitor.
Eric Anholt
2010-08-26
1
-10
/
+659
*
i965: Start building direct GLSL2 IR to 965 assembly codegen.
Eric Anholt
2010-08-26
4
-17
/
+381
*
i965: Add new pass to split vectors into scalar variables
Eric Anholt
2010-08-26
4
-1
/
+393
*
i965: Add a pass for the FS to reduce vector expressions down to scalar.
Eric Anholt
2010-08-26
4
-1
/
+384
*
i965: Start building 965 FS backend.
Eric Anholt
2010-08-26
6
-0
/
+109
*
i965: Add support for destination RelAddr writes in the VS.
Eric Anholt
2010-08-26
2
-13
/
+48
*
i965: Fix the test for variable indexing of shader inputs.
Eric Anholt
2010-08-26
1
-5
/
+11
*
intel: Merge identical cases in switch statement.
Nick Bowler
2010-08-26
1
-11
/
+5
*
r600: fix vertex buffer size calculation
Andre Maasikas
2010-08-26
2
-12
/
+2
*
r600: Remove unnecessary headers.
Vinson Lee
2010-08-25
5
-8
/
+0
*
r300: Remove unnecessary header.
Vinson Lee
2010-08-25
1
-1
/
+0
*
i965: Fix detection of implicit MOVs to message regs in brw_optimize.c.
Eric Anholt
2010-08-25
1
-24
/
+38
*
r300/compiler: emulate relative addressing with negative offsets in VS
Marek Olšák
2010-08-25
1
-0
/
+74
*
intel: Support EGL_MESA_image_drm
Kristian Høgsberg
2010-08-25
3
-0
/
+87
*
intel: Take an intel_screen pointer in intel_alloc_region_* functions
Kristian Høgsberg
2010-08-25
6
-37
/
+32
*
i965: Remove unnecessary header.
Vinson Lee
2010-08-25
1
-1
/
+0
*
r600: Include missing header in evergreen_fragprog.c.
Vinson Lee
2010-08-25
1
-0
/
+1
*
r600: Include missing header in evergreen_vertprog.c.
Vinson Lee
2010-08-25
1
-0
/
+1
*
r300/compiler: Silence uninitialized variable warning.
Vinson Lee
2010-08-24
1
-5
/
+11
*
r300g: Add missing comma in SConscript.
Vinson Lee
2010-08-24
1
-1
/
+1
*
r600: Include missing header in evergreen_render.c.
Vinson Lee
2010-08-24
1
-0
/
+1
*
r600: Remove unused variable.
Vinson Lee
2010-08-24
1
-1
/
+0
*
i965: Fix printf format warnings on 32-bit builds.
Vinson Lee
2010-08-24
1
-4
/
+4
*
r600: Remove unused variable.
Vinson Lee
2010-08-24
1
-1
/
+0
*
r600: Remove spaces between backslash and newline.
Vinson Lee
2010-08-24
1
-2
/
+2
*
r300/compiler: implement elimination of unused constants
Marek Olšák
2010-08-25
8
-1
/
+189
*
r300/compiler: terminate vertex shader compilation immediately after an error
Marek Olšák
2010-08-25
1
-36
/
+56
*
r300/compiler: fail to compile if we hit hw limits or an unimplemented feature
Marek Olšák
2010-08-25
3
-0
/
+62
*
r300/compiler: handle indexable temporaries correctly in deadcode elimination
Marek Olšák
2010-08-25
1
-1
/
+30
*
r300/compiler: disable register allocation for indexable temporaries in VS
Marek Olšák
2010-08-25
1
-5
/
+25
*
intel: Add support for MAX_SAMPLES=1 EXT_framebuffer_multisample.
Eric Anholt
2010-08-23
2
-1
/
+5
*
radeon: print chip family for evergreen in renderer string
Alex Deucher
2010-08-23
2
-2
/
+5
*
i965: Add sandybridge D0 pci ids
Zhenyu Wang
2010-08-23
1
-1
/
+3
*
i965: Fix 8-wide FB writes on gen6.
Eric Anholt
2010-08-22
1
-12
/
+5
*
i965: Fix brw_math1 with scalar argument in gen6 FS.
Eric Anholt
2010-08-22
1
-2
/
+14
*
i965: Fix up WM push constant setup on gen6.
Eric Anholt
2010-08-22
5
-26
/
+57
*
i965: Use intel->gen >= 6 instead of IS_GEN6.
Eric Anholt
2010-08-22
3
-5
/
+5
*
evergreen : initial support driver code.
richard
2010-08-20
41
-249
/
+12426
*
i965: Rename nr_depth_regs to nr_payload_regs.
Eric Anholt
2010-08-20
5
-8
/
+8
*
i965: Also use the SIMD8 FB writes for SIMD8 mode on non-SNB.
Eric Anholt
2010-08-20
3
-17
/
+18
*
i965: Add support for FB writes on Sandybridge.
Zhenyu Wang
2010-08-20
2
-12
/
+74
*
i965: Set the destination horiz stride even for da16, as SNB seems to need it.
Zhenyu Wang
2010-08-20
2
-2
/
+6
*
i965: Set the maximum number of threads on Sandybridge.
Zhenyu Wang
2010-08-20
1
-1
/
+5
*
i965: Add AccWrCtl support on Sandybridge.
Zhenyu Wang
2010-08-20
5
-2
/
+20
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