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* intel: Remove unnecessary header.Vinson Lee2010-11-201-1/+0
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* r600: Remove unnecesary header.Vinson Lee2010-11-201-1/+0
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* swrast: Remove unnecessary header.Vinson Lee2010-11-201-1/+0
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* i965: Remove duplicate MRF writes in the FS backend.Eric Anholt2010-11-192-0/+152
| | | | | | | | | | This is quite common for multitexture sampling, and not only cuts down on the second and later set of MOVs, but typically also allows compute-to-MRF on the first set. No statistically siginficant performance difference in nexuiz (n=3), but it reduces instruction count in one of its shaders and seems like a good idea.
* i965: Improve compute-to-mrf.Eric Anholt2010-11-191-53/+49
| | | | | | | | | | | | We were skipping it if the instruction producing the value we were going to compute-to-mrf used its result reg as a source reg. This meant that the typical "write interpolated color to fragment color" or "texture from interpolated texcoord" shader didn't compute-to-MRF. Just don't check for the interference cases until after we've checked if this is the instruction we wanted to compute-to-MRF. Improves nexuiz high-settings performance on my laptop 0.48% +- 0.08% (n=3).
* i965: Recognize saturates and turn them into a saturated mov.Eric Anholt2010-11-192-0/+27
| | | | | | On pre-gen6, this turns 4 instructions into 1. We could still do better by folding the saturate into the instruction generating the value if nobody else uses it, but that should be a separate pass.
* i965: Fold constants into the second arg of BRW_SEL as well.Eric Anholt2010-11-191-0/+1
| | | | This hits a common case with min/max operations.
* i965: Remove extra \n at the end of every instruction in INTEL_DEBUG=wm.Eric Anholt2010-11-191-1/+0
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* i965: Just use memset() to clear most members in FS constructors.Eric Anholt2010-11-191-18/+11
| | | | This should make it a lot harder to forget to zero things.
* i965: Fix compute_to_mrf to not move a MRF write up into another live range.Eric Anholt2010-11-191-7/+5
| | | | Fixes glsl-fs-copy-propagation-texcoords-1.
* mesa: Include C++ files in the makedepend of DRI drivers.Eric Anholt2010-11-191-2/+3
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* glsl: Combine many instruction lowering passes into one.Kenneth Graunke2010-11-191-4/+6
| | | | | | | This should save on the overhead of tree-walking and provide a convenient place to add more instruction lowering in the future. Signed-off-by: Ian Romanick <[email protected]>
* glsl: Add ir_quadop_vector expressionIan Romanick2010-11-191-0/+1
| | | | | | | | | | The vector operator collects 2, 3, or 4 scalar components into a vector. Doing this has several advantages. First, it will make ud-chain tracking for components of vectors much easier. Second, a later optimization pass could collect scalars into vectors to allow generation of SWZ instructions (or similar as operands to other instructions on R200 and i915). It also enables an easy way to generate IR for SWZ instructions in the ARB_vertex_program assembler.
* glsl: Eliminate assumptions about size of ir_expression::operandsIan Romanick2010-11-191-0/+3
| | | | This may grow in the near future.
* glsl: Add ir_unop_sin_reduced and ir_unop_cos_reducedIan Romanick2010-11-191-0/+2
| | | | | | | | | | | | The operate just like ir_unop_sin and ir_unop_cos except that they expect their inputs to be limited to the range [-pi, pi]. Several GPUs require this limited range for their sine and cosine instructions, so having these as operations (along with a to-be-written lowering pass) helps this architectures. These new operations also matche the semantics of the GL_ARB_fragment_program SCS instruction. Having these as operations helps in generating GLSL IR directly from assembly fragment programs.
* dri/nouveau: Clean up magic numbers in get_rt_formatViktor Novotný2010-11-193-13/+13
| | | | | Signed-off-by: Viktor Novotný <[email protected]> Signed-off-by: Francisco Jerez <[email protected]>
* mesa: pass gl_format to _mesa_init_teximage_fields()Brian Paul2010-11-188-56/+72
| | | | | | | | | | | This should prevent the field going unset in the future. See bug http://bugs.freedesktop.org/show_bug.cgi?id=31544 for background. Also remove unneeded calls to clear_teximage_fields(). Finally, call _mesa_set_fetch_functions() from the _mesa_init_teximage_fields() function so callers have one less thing to worry about.
* i965: Eliminate dead code more aggressively.Eric Anholt2010-11-181-13/+4
| | | | | | | | | | If an instruction writes reg but nothing later uses it, then we don't need to bother doing it. Before, we were just killing code that was never read after it was ever written. This removes many interpolation instructions for attributes with only a few comopnents used. Improves nexuiz high-settings performance .46% +/- .12% (n=3) on my Ironlake.
* i965: Fail on loops on gen6 for now until we write the EU emit code for it.Eric Anholt2010-11-181-0/+4
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* i965: Add dumping of the sampler default color.Eric Anholt2010-11-181-0/+11
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* i965: Add state dumping for sampler state.Eric Anholt2010-11-181-2/+39
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* i965: Shut up spurious gcc warning about GLSL_TYPE enums.Eric Anholt2010-11-181-0/+4
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* glsl: Remove the ir_binop_cross opcode.Kenneth Graunke2010-11-172-29/+0
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* r600c/evergreen: texture align is group_bytes just like 6xx/7xxAlex Deucher2010-11-172-14/+15
| | | | | | Default group bytes to 512 on evergreen. Don't query tiling config yet for evergreen, the current info returned is not adequate for evergreen (no way to get bank info).
* r600: Evergreen has two extra frac_bits for the sampler LOD state.Henri Verbeet2010-11-151-3/+3
| | | | Note: this is a candidate for the 7.9 branch.
* dri/nouveau: Kill a bunch of ternary operators.Francisco Jerez2010-11-157-24/+33
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* dri/nouveau: Fix typo.Francisco Jerez2010-11-152-2/+1
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* dri/nouveau: Remove nouveau_class.h, finishing switch to rules-ng-ng headersViktor Novotný2010-11-151-4961/+0
| | | | Signed-off-by: Francisco Jerez <[email protected]>
* dri/nouveau nv20: Use rules-ng-ng headersViktor Novotný2010-11-158-250/+248
| | | | Signed-off-by: Francisco Jerez <[email protected]>
* dri/nouveau: nv10: Use rules-ng-ng headersViktor Novotný2010-11-159-231/+228
| | | | Signed-off-by: Francisco Jerez <[email protected]>
* dri/nouveau: nv04: Use rules-ng-ng headersViktor Novotný2010-11-158-17/+23
| | | | Signed-off-by: Francisco Jerez <[email protected]>
* dri/nouveau: Import headers from rules-ng-ngViktor Novotný2010-11-156-0/+6200
| | | | Signed-off-by: Francisco Jerez <[email protected]>
* evergreen: set gl_texture_image::TexFormat field in evergreenSetTexBuffer()Brian Paul2010-11-151-0/+4
| | | | | | See https://bugs.freedesktop.org/show_bug.cgi?id=31544 Note: this is a candidate for the 7.9 branch.
* r300: set gl_texture_image::TexFormat field in r300SetTexBuffer2()Brian Paul2010-11-151-2/+8
| | | | | | See https://bugs.freedesktop.org/show_bug.cgi?id=31544 Note: this is a candidate for the 7.9 branch
* r200: set gl_texture_image::TexFormat field in r200SetTexBuffer2()Brian Paul2010-11-151-2/+8
| | | | | | See https://bugs.freedesktop.org/show_bug.cgi?id=31544 Note: this is a candidate for the 7.9 branch.
* r600: set gl_texture_image::TexFormat field in r600SetTexBuffer2()Brian Paul2010-11-151-0/+4
| | | | | | See https://bugs.freedesktop.org/show_bug.cgi?id=31544 Note: this is a candidate for the 7.9 branch.
* radeon: set gl_texture_image::TexFormat field in radeonSetTexBuffer2()Brian Paul2010-11-151-2/+8
| | | | | | See https://bugs.freedesktop.org/show_bug.cgi?id=31544 Note: this is a candidate for the 7.9 branch
* radeon: fix potential segfault in renderbuffer updateDaniel Lichtenberger2010-11-151-2/+1
| | | | | | | Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=31617 Signed-off-by: Alex Deucher <[email protected]>
* i965: Fix gl_FragCoord inversion when drawing to an FBO.Eric Anholt2010-11-143-3/+6
| | | | | | This showed up as cairo-gl gradients being inverted on everyone but Intel, where I'd apparently tweaked the transformation to work around the bug. Fixes piglit fbo-fragcoord.
* i965: Silence uninitialized variable warning.Vinson Lee2010-11-131-0/+1
| | | | | | Silences this GCC warning. brw_fs.cpp: In member function 'void fs_visitor::split_virtual_grfs()': brw_fs.cpp:2516: warning: unused variable 'reg'
* tdfx: s/Format/_BaseFormat/Brian Paul2010-11-111-2/+2
| | | | Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31560
* dri/nouveau: Split hardware/software TNL instantiation more cleanly.Francisco Jerez2010-11-119-66/+84
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* intel: Add a new B43 pci id.Robert Hooker2010-11-102-1/+4
| | | | Signed-off-by: Robert Hooker <[email protected]>
* i965: re-enable gen6 IF statements in the fragment shader.Eric Anholt2010-11-102-6/+1
| | | | | | | | | | | | | | | | | | IF statements were getting flattened while they were broken. With Zhenyu's last fix for ENDIF's type, everything appears to have lined up to actually work. This regresses two tests: glsl1-! (not) operator (1, fail) glsl1-! (not) operator (1, pass) but fixes tests that couldn't work before because the IFs couldn't be flattened: glsl-fs-discard-01 occlusion-query-discard (and, naturally, this should be a performance improvement for apps that actually use IF statements to avoid executing a bunch of code).
* i965: Work around strangeness in swizzling/masking of gen6 math.Eric Anholt2010-11-101-11/+58
| | | | | | | | | | | | | | | | | | | | Sometimes we swizzled in a different channel it looked like, and sometimes we swizzled in zero. Or something. Having looked at the output of another code generator for this chip, this is approximately what they do, too: use align1 math on temporaries, and then move the results into place. Fixes: glean/vp1-EX2 test glean/vp1-EXP test glean/vp1-LG2 test glean/vp1-RCP test (reciprocal) glean/vp1-RSQ test 1 (reciprocal square root) shaders/glsl-cos shaders/glsl-sin shaders/glsl-vs-masked-cos shaders/vpfp-generic/vp-exp-alias
* r200: fix r200 large pointsRoland Scheidegger2010-11-102-7/+5
| | | | | | | | | | | | | | | | | | | | DD_POINT_SIZE got never set for some time now (as it was set only in ifdefed out code), which caused the r200 driver to use the point primitive mistakenly in some cases which can only do size 1 instead of point sprite. Since the logic to use point instead of point sprite prim is flaky at best anyway (can't work correctly for per-vertex point size), just drop this and always emit point sprites (except for AA points) - reasons why the driver tried to use points for size 1.0 are unknown though it is possible they are faster or more conformant. Note that we can't emit point sprites without point sprite cntl as that might result in undefined point sizes, hence need drm version check (which was unnecessary before as it should always have selected points). An alternative would be to rely on the RE point size clamp controls which could clamp the size to 1.0 min/max even if the SE point size is undefined, but currently always use 0 for min clamp. (As a side note, this also means the driver does not honor the gl spec which mandates points, but not point sprites, with zero size to be rendered as size 1.) This should fix recent reports of https://bugs.freedesktop.org/show_bug.cgi?id=702. This is a candidate for the mesa 7.9 branch.
* Revert "i965: VS use SPF mode on sandybridge for now"Zhenyu Wang2010-11-102-5/+1
| | | | | | This reverts commit 9c39a9fcb2c76897e9b5aff68ce197a411c4e25c. Remove VS SPF mode, conditional instruction works for VS now.
* i965: fix dest type of 'endif' on sandybridgeZhenyu Wang2010-11-101-1/+1
| | | | That should also be immediate value for type W.
* i965: Add support for math on constants in gen6 brw_wm_glsl.c path.Eric Anholt2010-11-091-4/+5
| | | | Fixes 10 piglit cases that were assertion failing.
* i965: Allow OPCODE_SWZ to put immediates in the first arg.Eric Anholt2010-11-091-0/+1
| | | | | | | | | | | Fixes assertion failure with texture swizzling in the GLSL path when it's triggered (such as gen6 FF or ARB_fp shadow comparisons). Fixes: texdepth texSwizzle fp1-DST test fp1-LIT test 3
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