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* i965/vs: add support for emitting gl_ClipVertexChris Forbes2013-06-072-7/+3
| | | | | | | | | | | Removes the special-case suppression of gl_ClipVertex in the VUE map. Also calculate vertex outcodes for user clip planes based on gl_ClipVertex if written; otherwise gl_Position. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/clip: Add support for gl_ClipVertexChris Forbes2013-06-073-4/+55
| | | | | | | | | | | When clipping triangles against a user clip plane, and gl_ClipVertex is provided in the vertex, use it instead of hpos. TODO: A similar change should be made at some point for line clipping. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Use the CHIPSET macro in the PCI ID tables for the device name.Kenneth Graunke2013-06-061-184/+4
| | | | | | | | | | | | | Putting the human readable device names directly in the PCI ID list consolidates things in one place. It also makes it easy to customize the name on a per-PCI ID basis without a huge code explosion. Based on a patch by Kristian Høgsberg. v2: Fix 830M/845G names and #undef CHIPSET (caught by Emit Velikov). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Adding more reserved PCI IDs for Haswell.Rodrigo Vivi2013-06-052-3/+77
| | | | | | | | | | | At DDX commit Chris mentioned the tendency we have of finding out more PCI IDs only when users report. So Let's add all new reserved Haswell IDs. NOTE: This is a candidate for stable branches. Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=63701 Signed-off-by: Rodrigo Vivi <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* mesa: remove outdated version lines in commentsRico Schüller2013-06-052-2/+0
| | | | Signed-off-by: Brian Paul <[email protected]>
* intel: Don't try to blorp or blit CopyTexSubImage(1D_ARRAY).Paul Berry2013-06-042-0/+7
| | | | | | | | | | | | | | | | Blorp and the hardware blitter can't be used to implement CopyTexSubImage when the image type is 1D_ARRAY, because of a coordinate system mismatch (the Y coordinate in the source image is supposed to be matched up to the Z coordinate in the destination texture). The hardware blitter path (intel_copy_texsubimage) contained a perf debug warning for this case, but it failed to actually fall back. The blorp path didn't even check. Fixes piglit test "copyteximage 1D_ARRAY". Reviewed-by: Eric Anholt <[email protected]>
* i965/gen6+: Fix multisample assertions in CopyTexSubImage hw blitter path.Paul Berry2013-06-041-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit 045612c (intel: Add an assert for glCopyTexSubImage() being called on MSAA buffers) added an assertion to intel_copy_texsubimage() to make sure that multisampling was not in use, based on the assumption that glCopyTexSubImage() can't legally be used with multisampling. However, there is one case where glCopyTexSubImage() can legally be used with multisampling: when the source buffer is a multisampled window system buffer. If the source and destination color formats don't match, the blorp path will fail, so intel_copy_texsubimage() will be called. In this case, we need intel_copy_texsubimage() to return false so that we fall back to meta to do the copy. (The multisampled source buffer won't cause a problem for the meta path, because it uses glReadPixels, which forces a multisample resolve). It's still safe to assert that the destination image is single-sampled, because it's not legal to call glCopyTexSubImage() on multisampled textures. Fixes some failures with piglit tests "copyteximage {1D,2D,CUBE,RECT,2D_ARRAY}" (with "samples=..." argument). Reviewed-by: Eric Anholt <[email protected]>
* i965: fix problem with constant out of bounds access (v3)Dave Airlie2013-06-043-1/+16
| | | | | | | | | | | | | | | | | | | | | | | Okay I now understand why Frank would want to run away, this is my attempt at fixing the CVE out of bounds access to constants outside the range. This attempt converts any illegal constants to constant 0 as per the GL spec, and is undefined behaviour. A future patch should add some debug for users to find this out, but this needs to be backported to stable branches. CVE-2013-1872 v2: drop the last hunk which was a separate fix (now in master). hopefully fix the indentations. v3: don't fail piglit, the whole 8/16 dispatch stuff was over my head, and I spent a while figuring it out, but this one is definitely safe, one piglit pass extra on my Ironlake. NOTE: This is a candidate for stable branches. Signed-off-by: Dave Airlie <[email protected]>
* intel: Fix copying of separate stencil data in glCopyTexSubImage().Eric Anholt2013-06-031-8/+15
| | | | | | | | | | | | | We were copying the source stencil data onto the destination depth data. Fixes piglit copyteximage other than 1D_ARRAY. v2: Fix unintentional dropping of the "don't double-copy for packed depth/stencil" check. While blorp is only supported on separate stencil hardware at the moment, hopefully that will change soon. Review by Jordan. Reviewed-by: Jordan Justen <[email protected]>
* intel: Fix performance regression from miptree blit changes.Eric Anholt2013-06-032-3/+2
| | | | | | | | | | | | | | When making v2 of da2880bea05bfc87109477ab026a7f5401fc8f0c, I carefully checked all of the calls in that commit to see that I'd updated them, but forgot to update the new calls in the later commits such as .e845c5cf7abce55759501a473459aff3bf25c9ca. As a result, we were getting Y tiled temporaries even though the whole point of the temporary was to untile! The steady state of the intro scene of lightsmark goes from 13 to 17 fps. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65154 Reviewed-by: Chad Versace <[email protected]>
* i965: Fix glColorPointer(GL_FIXED)Chad Versace2013-06-031-0/+8
| | | | | | | | | | | | | | | | | | | | | When a gl_client_array is created with glColorPointer, gl_client_array::Normalized is true. This caused the translation from the gl_client_array's type to a BRW_SURFACEFORMAT to assertion fail. Fixes the spinning cube's color in Android 4.2's ApiDemos.apk, "Graphics > OpenGL ES". Fixes assertion failure in mesa-demos/src/egl/opengles1/tri_x11 on Haswell and Ivybridge: brw_draw_upload.c:287: get_surface_type: Assertion `0' failed. No Piglit regressions on Haswell. Note: This is a candidate for the 9.1 branch. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42182 Issue: AXIA-2954 Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965 gen7: use SURFACE_STATE fields to select render level/layerJordan Justen2013-06-022-18/+46
| | | | | | | | | | Rather than pointing the surface_state directly at a single sub-image of the texture for rendering, we now point the surface_state at the top level of the texture, and configure the surface_state as needed based on this. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* intel: add layered parameter to update_renderbuffer_surfaceJordan Justen2013-06-023-1/+9
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* intel_fbo: set gl_renderbuffer Depth fieldJordan Justen2013-06-021-0/+2
| | | | | | | | | Set the renderbuffer's Depth field to match the texture's Depth when rendering to a texture. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* intel: print image depth in debug messageJordan Justen2013-06-021-2/+2
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Fix haswell_upload_cut_index when there's no index buffer.Kenneth Graunke2013-05-311-1/+13
| | | | | | | | | | | | | brw->ib.type is reset to -1 at the start of each batch. If there's no index buffer, it won't get updated to a sensible value, resulting in _mesa_primitive_restart_index's "Invalid index buffer type" assertion tripping. Fixes a regression since 7c87a3b5dac118697a9b67caa7b6d5cab60f316d. NOTE: This is a candidate for the 9.1 branch (and should be squashed). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65195 Signed-off-by: Kenneth Graunke <[email protected]>
* intel: Add multisample scaled blitting in blorp engineAnuj Phogat2013-05-304-74/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | In traditional multisampled framebuffer rendering, color samples must be explicitly resolved via BlitFramebuffer before doing the scaled blitting of the framebuffer. So, scaled blitting of a multisample framebuffer takes two separate calls to BlitFramebuffer. This patch implements the functionality of doing multisampled scaled resolve using just one BlitFramebuffer call. Important changes involved in this patch are listed below: - Use float registers to scale and offset texture coordinates. - Change offset computation to consider float coordinates. - Round the scaled coordinates down to nearest integer. - Modify src texture coordinates clipping to account for scaling.. - Linear filter is not yet implemented in blorp. So, don't use blorp engine to do single sampled scaled blitting. V3: Fix nearest filtering issue in scaled blits. Makes failing piglit fbo-blit-stetch test and framebuffer_blit_functionality_magnifying_blit.test in gles3 CTS pass. Observed no piglit, gles3 CTS regressions on sandybridge & ivybridge with this patch. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* intel: Change the register type from UW to UD in blorp engineAnuj Phogat2013-05-303-52/+90
| | | | | | | | | | These changes are required to implement scaled blitting in blorp in my next patch. No regressions observed in piglit quick-driver.tests with this patch. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* Revert "i965: fix problem with constant out of bounds access (v2)"Kenneth Graunke2013-05-291-11/+1
| | | | | | | | This reverts commit 98dfd59a0445666060c97b0dccaf0e9f030b547a. The patch was clearly not Piglit tested, as it caused at least 225 tests to start crashing with assertion failures. That was before my desktop tanked and the test run died completely.
* i965: fix problem with constant out of bounds access (v2)Dave Airlie2013-05-301-1/+11
| | | | | | | | | | | | | | | | | | | | This is my attempt at fixing this as the CVE is making RH security team care enough to make me look at this. (please upstream, security fixes are more important than whatever else you are doing, if for no other reason than it saves me having to fix stuff I've no real clue about). Since Frank's original fix was denied, here is my attempt to just alias all constants that are out of bounds < 0 or > nr_params to constant 0, hopefully this provides the undefined behaviour idr requires.. CVE-2013-1872 v2: drop the last hunk which was a separate fix (now in master). hopefully fix the indentations. NOTE: This is a candidate for stable branches. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* intel: initialize fs_visitor::params_remap in constructorFrank Henigman2013-05-301-0/+2
| | | | | | | | | | | | Set fs_visitor::params_remap to NULL in the constructor. This variable was potentially tested in fs_visitor::remove_dead_constants() before being set. NOTE: This is a candidate for stable release branches. Signed-off-by: Frank Henigman <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965: Fix can_cut_index_handle_restart_index() for byte/short types.Kenneth Graunke2013-05-291-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Pre-Haswell hardware doesn't support an arbitrary restart index, and instead compares the index buffer value against 0xFF for byte-size buffers, 0xFFFF for short-size buffers, or 0xFFFFFFFF for unsigned integer buffers. OpenGL allows the restart index to be an arbitrary unsigned integer. When comparing against byte/short types, the index buffer value should be promoted to a full 32-bit integer before doing the comparison. The restart index is /not/ supposed to be masked to byte/short size. This means that with certain restart indexes, the comparison should always fail. For example, a restart index of 0xF000FFFF should never match any byte/short index buffer values due to the extra high bits. We must not enable hardware primitive restart in such a case. For now, fall back to software primitive restart as it's the simplest fix. In the future, we could detect restart indexes that will never match and skip both hardware and software primitive restart. NOTE: This is a candidate for stable branches. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Use the correct restart index for fixed index mode on Haswell.Kenneth Graunke2013-05-291-2/+4
| | | | | | | | | | | | | | | | | | | | | | The code that updates the ctx->Array._RestartIndex derived state mashed it to 0xFFFFFFFF when GL_PRIMITIVE_RESTART_FIXED_INDEX was enabled regardless of the index buffer type. It's supposed to be 0xFF for byte, 0xFFFF for short, or 0xFFFFFFFF for integer types. The new _mesa_primitive_restart_index() helper gets this right. The hardware appears to compare against the full 32-bit value some of the time, causing primitive restart not to occur when it should. The fact that it works some of the time is rather frightening. Fixes sporadic failures in the ES 3 instanced_arrays_primitive_restart conformance test when run in combination with other tests. NOTE: This is a candidate for the 9.1 branch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/vs: Fix implied_mrf_writes() for integer division pre-gen6.Eric Anholt2013-05-291-0/+2
| | | | | | | | | | | Previously it would assertion fail in debug builds (though the correct value was returned in a non-debug build). Marking it as a candidate for stable even though it has no current consumers in the stable branches, in case one shows up in a later backport. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64727 NOTE: This is a candidate for stable branches. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix test for smearing enabled on an instruction.Eric Anholt2013-05-291-1/+1
| | | | | | | | | | | | | | | | We were expanding the live range too far, breaking register_coalesce_2() and compute_to_mrf() on 16-wide shaders. Turning it back on improves GLB2.7 performance by 0.239355% +/- 0.0850649% (n=398). shader-db stats are: total instructions in shared programs: 1627211 -> 1609262 (-1.10%) instructions in affected programs: 450351 -> 432402 (-3.99%) While 33 new 16-wide shaders are gained, 70 are lost. Despite that, tropics (the app that lost the most 16-wide) shows a .41% +/- .16% (n=7/8, first-run outlier removed) performance improvement on my HSW. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix segfault in instruction scheduling with LINTERP using last GRF.Eric Anholt2013-05-291-2/+8
| | | | | | | | | The scheduler didn't know about uniform-type accesses, and if a uniform access was last in a 16-wide, we'd walk off the end of the array. This never happened, because we'd never coalesce out all the GRFs, due to a bug to be fixed in the next commit. Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Enable blit glCopyTexSubImage/glBlitFramebuffer with sRGB.Eric Anholt2013-05-281-5/+11
| | | | | | | | | | | | Since the introduction of default-to-SARGB8 window system framebuffers, non-blorp hardware lost blit acceleration for these two paths between the window system and ARGB8888 textures. Since we shouldn't be doing any conversion anyway, just compatibility-check the linear variants of the formats. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61954 Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Tobias Jakobi <[email protected]>
* intel: Remove dead intel_drawbuf_region().Eric Anholt2013-05-282-16/+0
| | | | | | | | Since the glBitmap() MRT change, it's unused. There was basically no way to responsibly use this function since MRT was introduced. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Fix format handling of blit glBitmap()Eric Anholt2013-05-281-3/+12
| | | | | | | | | | | Any 32-bit format got ARGB8888 handling (including, say, GL_RG1616), and anything else got 16-bit (including, say, GL_R8), which could potentially hang the GPU by writing out of bounds. NOTE: This is a candidate for the stable branches. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Fix MRT handling of glBitmap().Eric Anholt2013-05-281-9/+14
| | | | | | | | | We'd only hit color buffer 0 even if multiple draw buffers were bound. NOTE: This is a candidate for the stable branches. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Rebuild PBO blit glTexImage() on top of miptrees.Eric Anholt2013-05-281-30/+32
| | | | | | | | | | | | | | This will ensure that we have resolves if we ever extend this to glTexSubImage(), and fixes missing image start offset handling. The texture buffer alloc ended up getting moved up, because we want to look at the format of the image's actual mt to see if we'll end up blitting the right thing, in the case of packed depth/stencil uploads. This is the last caller of intelEmitCopyBlit() on a miptree-wrapped BO. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Rebuild PBO blit glReadPixels() on top of miptrees.Eric Anholt2013-05-281-25/+23
| | | | | | | | | The previous code was missing depth resolves, that had only been prevented due to no blitting of Y tiling. The pair of flip args in the new blit function means that we can just drop the pack->Invert fallback. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Rework intel_miptree_create_for_region() to wrap a BO.Eric Anholt2013-05-283-24/+67
| | | | | | | | | | | | | I needed to do this for the PBO blit cases to use intel_miptree_blit(). But this also actually partially fixes a bug in EGLImage handling: We can't share regions across contexts, because regions have a refcount that isn't protected by a mutex, and different contexts can be simulataneously accessed from multiple threads. Now we just need to get regions out of __DRIImage. There was also a missing use of image->offset in the EGLImage renderbuffer storage code. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Make a temporary miptree for the blit path of miptree mapping.Eric Anholt2013-05-282-74/+29
| | | | | | | | | | | In a bit of debug code, we no longer have the inter-slice x/y to print. But I think the level/slice is more useful in this case for looking at what's getting mapped, especially given that INTEL_DEBUG=blit will tell you the other value. Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Make a temporary miptree when doing blit uploads for glTexSubImage().Eric Anholt2013-05-281-44/+28
| | | | | | | | | | | While this is a bit more CPU work, it also is less code to handle this path, and fixes problems with 32k-pitch textures and missing resolves. v2: Add error checking in new code. Reviewed-and-tested-by: Ian Romanick <[email protected]> (v1) Reviewed-by: Kenneth Graunke <[email protected]> (v1) Acked-by: Paul Berry <[email protected]>
* intel: Extend the force_y_tiling flag to allow forcing no tiling.Eric Anholt2013-05-285-13/+26
| | | | | | | | | | | | For a blit-uploaded temporary, it's faster on current hardware to memcpy the data into a linear CPU mapping than to go through the GTT. v2: Turn the not-fully-supported mask into 3 supported enum values. Reviewed-and-tested-by: Ian Romanick <[email protected]> (v1) Reviewed-by: Kenneth Graunke <[email protected]> (v1) Reviewed-by: Paul Berry <[email protected]> (v2) Reviewed-by: Chad Versace <[email protected]> (v2)
* intel: Add an assert for glCopyTexSubImage() being called on MSAA buffers.Eric Anholt2013-05-281-0/+6
| | | | | | | | | This is just in case someone else trips over this due to our weird reuse of this code in glBlitFramebuffer(). Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* i965: Allow glCopyTexSubImage() on depth textures.Eric Anholt2013-05-281-5/+0
| | | | | | | | If the hw is pre-gen5 and can't blit depth, it'll cleanly error out. Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* i965: Prefer blorp glBlitFramebuffer() to the glCopyTexSubImage-based blit.Eric Anholt2013-05-281-8/+9
| | | | | | | | | | | | I think we've measured no performance difference from this in the past, except that the blorp code can do things like multisample resolves. Prevents piglit regression in the next commit when a testcase started trying to do a multisampled resolve through the old glCopyTexSubImage() path. Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* i965: Consistently do depth resolves before blitting.Eric Anholt2013-05-282-6/+6
| | | | | | | | | | | | | We were protected for a long time by the fact that depth was Y tiled and you couldn't blit Y. Now that we can blit Y, we were failing to resolve depth in glCopyPixels(). Note in the comment about swrast, that the swrast map path does resolves appropriately already. Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Make a wrapper for intelEmitCopyBlit using miptrees.Eric Anholt2013-05-285-111/+127
| | | | | | | | | | | | | | I had previously asserted that it was hard to write a useful, simpler blit function, but I think this might be it. This has the side effect of extending the 32k pitch check to a few more places that were missing it. v2: Update comment for being moved inside intel_miptree_blit(). Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Rename intel_renderbuffer_tile_offsets.Eric Anholt2013-05-283-6/+6
| | | | | | | | This makes it more consistent with intel_miptree_get_tile_offsets(). Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Reduce intel_renderbuffer_tile_offsets to a thin wrapper.Eric Anholt2013-05-282-28/+7
| | | | | | Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Make intel_miptree_get_tile_offsets return a page offset.Eric Anholt2013-05-284-10/+26
| | | | | | | | | Right now, the callers in i965 don't expect a nonzero page offset to actually occur (since that's being handled elsewhere), but it seems like a trap to leave it this way. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* i965: Go back to using the kernel SOL reset feature.Kenneth Graunke2013-05-233-8/+7
| | | | | | | | | | | | | | | It turns out the MI_LOAD_REGISTER_IMM approach doesn't work on Haswell, and regressed essentially all the transform feedback Piglit tests. This morally reverts eaa6fbe6d54dc99efac4ab8e800edef65ce8220d. However, the code is still simpler than it was. On BeginTransformFeedback, we simply flush the batch and set the SOL reset flag so that the next batch will start with zeroed offsets. There's still no software counting. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64887 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Enable guardband clipping on Gen4/5.Chris Forbes2013-05-241-3/+45
| | | | | | | | | | Enables guardband clipping when the viewport covers the entire render target. No piglit regressions on Ironlake. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* intel: Count fragments in our blitter-based glBitmap() path.Eric Anholt2013-05-221-8/+12
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59440 Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Shut up more compiler warnings from vector insert/extract changes.Eric Anholt2013-05-221-0/+8
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Skip etc-to-rgb transcode on BayTrail.Eric Anholt2013-05-201-31/+33
| | | | | | The hardware does it, so no need for this workaround. Reviewed-and-tested-by: Kenneth Graunke <[email protected]>
* i965: Split BeginTransformFeedback hook into Gen6 and Gen7+ variants.Kenneth Graunke2013-05-214-29/+42
| | | | | | | | | | | Most of the work in BeginTransformFeedback is only necessary on Gen6. We may as well just skip it on Gen7+. v2: Add an intel->gen == 6 assert. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Paul Berry <[email protected]>
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