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path: root/src/mesa/drivers/dri
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* meson: don't use intermediate variables that are immediately discardedDylan Baker2018-01-111-2/+1
* meson: Use consistent styleDylan Baker2018-01-112-13/+21
* dri_util: remove ALLOW_RGB10_CONFIGS option (v2)Marek Olšák2018-01-102-5/+2
* i965/nir: lower TES PatchVerticesIn to a constant when a TCS is presentIago Toral Quiroga2018-01-101-4/+22
* glsl: remove Lower{TCS,TES}PatchVerticesInIago Toral Quiroga2018-01-101-2/+0
* i965: lower gl_PatchVerticesIn to a uniformIago Toral Quiroga2018-01-101-0/+8
* i965/nir: add a helper to lower gl_PatchVerticesIn to a uniformIago Toral Quiroga2018-01-101-0/+25
* intel: Apply Geminilake "Barrier Mode" workaround.Kenneth Graunke2018-01-092-0/+20
* i965: Torch public intel_batchbuffer_emit_dword/float helpers.Kenneth Graunke2018-01-062-15/+2
* i965: Require space for MI_BATCHBUFFER_END.Kenneth Graunke2018-01-061-2/+5
* i965: Shut up a few unused variable warnings.Kenneth Graunke2018-01-061-2/+2
* i965/screen: Honor 'allow_rgb10_configs' option. (v2)Mario Kleiner2018-01-031-0/+19
* dri/common: Add option to allow exposure of 10 bpc color configs. (v2)Mario Kleiner2018-01-031-4/+8
* i965/screen: Add basic support for rendering 10 bpc/depth 30 framebuffers. (v3)Mario Kleiner2018-01-031-1/+11
* i965/screen: Add XRGB2101010 and ARGB2101010 support for DRI3.Mario Kleiner2018-01-031-0/+6
* i965: Support accelerated blit for depth 30 formats. (v2)Mario Kleiner2018-01-031-1/+19
* i965: Support xrgb/argb2101010 formats for glx_texture_from_pixmap.Mario Kleiner2018-01-031-2/+10
* i965: Drop support for the legacy SNORM -> Float equation.Kenneth Graunke2018-01-021-1/+0
* intel/compiler/gen10: Disable push constants.Rafael Antognolli2017-12-191-0/+7
* i965: Allow old begin/end queryobj for gen4/5 with HW contextsChris Wilson2017-12-151-6/+0
* i965: enable EXT_disjoint_timer_query extensionTapani Pälli2017-12-151-0/+2
* intel/decoder: Take a bit offset in gen_print_groupJason Ekstrand2017-12-141-5/+5
* i965: Don't allocate an MCS for 16x MSAA and width > 8192.Kenneth Graunke2017-12-141-0/+4
* i965: compute scratch space size correctly for Gen9+Kevin Rogovin2017-12-121-1/+5
* i965: Program MEDIA_VFE_STATE in a more readable fashion.Kevin Rogovin2017-12-121-6/+13
* i915: add missing 0 definesEric Engestrom2017-12-121-0/+2
* i965: Add ARB_get_program_binary support using nir_serializationJordan Justen2017-12-086-6/+99
* i965: Fix memory leak when serializing nirJordan Justen2017-12-081-0/+1
* i965: Add brw_program_serialize_nirJordan Justen2017-12-083-6/+14
* i965: Free serialized nir after deserializingJordan Justen2017-12-081-0/+6
* i965: Add brw_program_deserialize_nirJordan Justen2017-12-083-23/+28
* i965: include brw_pipe_control.h in the tarballEmil Velikov2017-12-061-0/+1
* i965/cnl: Avoid fast-clearing sRGB render buffersNanley Chery2017-12-041-2/+12
* meson: Install dri.pc file when building gallium dri driversDylan Baker2017-12-041-7/+11
* i965: read CS timestamp frequency from the kernel on Gen10+Lionel Landwerlin2017-12-041-0/+24
* i965: Emit CS stall before MEDIA_VFE_STATE.Kenneth Graunke2017-12-041-0/+12
* i965: Move PIPE_CONTROL defines and prototypes to brw_pipe_control.h.Kenneth Graunke2017-12-044-62/+90
* i965: Serialize nir later in the linking processJordan Justen2017-12-011-9/+16
* i965/gen10: Change the order of PIPE_CONTROL and load register.Rafael Antognolli2017-12-011-3/+3
* i965/gen10: emit 3DSTATE_MULTISAMPLE more often.Rafael Antognolli2017-12-011-1/+2
* i965: Disable regular fast-clears (CCS_D) on gen9+Jason Ekstrand2017-12-012-25/+43
* mesa: add AllowGLSLCrossStageInterpolationMismatch workaroundTapani Pälli2017-11-302-0/+4
* i965: Reorganize batch/state BO fields into a 'brw_growing_bo' struct.Kenneth Graunke2017-11-298-97/+103
* i965: Don't grow batch/state buffer on every emit after an overflow.Kenneth Graunke2017-11-291-23/+19
* i965: Preserve EXEC_OBJECT_CAPTURE when growing the BO.Kenneth Graunke2017-11-291-0/+3
* i965: Use old_bo->align when growing batch/state buffer instead of 4096.Kenneth Graunke2017-11-291-1/+2
* i965: Program the dynamic state heap size to MAX_STATE_SIZE.Kenneth Graunke2017-11-293-10/+10
* mesa: deal with vs_inputs as 64-bit unsigned integerJuan A. Suarez Romero2017-11-291-4/+4
* i965: Change a ret == -1 check to ret != 0.Kenneth Graunke2017-11-281-1/+1
* i965: Use C99 struct initializers in brw_bufmgr.c.Kenneth Graunke2017-11-281-91/+49
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