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path: root/src/mesa/drivers/dri
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* i965/gen6+: Switch GLSL from ALT to IEEE floating point modePaul Berry2011-10-314-6/+26
* radeon/r200: drop remains of r300/r600 support along with old drm 1.x kernelDave Airlie2011-10-3015-553/+102
* intel: enable GL_OES_draw_textureChia-I Wu2011-10-301-0/+1
* i965: Remove the prepare() hook from state atoms.Eric Anholt2011-10-291-1/+0
* i965: Remove the memcpy()ed atoms array now that everything is emit()-based.Eric Anholt2011-10-292-12/+9
* i965: Merge brw_validate_state() and brw_upload_state() together.Eric Anholt2011-10-293-19/+5
* i965: Remove state upload code for calling prepare() now that there are none.Eric Anholt2011-10-291-20/+3
* i965: Remove some old texturing debug code.Eric Anholt2011-10-293-21/+0
* i965: Finally, move the global fallbacks check to emit() time.Eric Anholt2011-10-291-1/+1
* i965: Move index buffer upload to emit() time.Eric Anholt2011-10-291-2/+2
* i965: Do a hack job of merging VB prepare()/emit() together.Eric Anholt2011-10-291-1/+2
* i965: Move the WM input sizes calculation to emit() time.Eric Anholt2011-10-291-1/+1
* i965: Move program compile to emit() time.Eric Anholt2011-10-295-9/+13
* i965/gen4: Move CURBE offset calculation to emit() time.Eric Anholt2011-10-291-1/+1
* i965/gen4: Fold push constant prepare()/emit() together.Eric Anholt2011-10-291-13/+9
* i965/gen6: Move viewport state setup to emit() time.Eric Anholt2011-10-291-4/+4
* i965/gen4: Move URB fence recalculate to emit() time.Eric Anholt2011-10-291-1/+1
* i965: Fold the gen6/7 URB state prepare()/emit() together.Eric Anholt2011-10-292-18/+6
* i965: Move VS pull constant upload to emit() time.Eric Anholt2011-10-291-2/+2
* i965: Fold prepare() and emit() of VS surface state setup together.Eric Anholt2011-10-291-37/+25
* i965: Move WM pull constant setup to emit() time.Eric Anholt2011-10-291-2/+2
* i965/gen7: Fold WM surface state prepare()/emit() together.Eric Anholt2011-10-291-38/+18
* i965/gen4: Fold WM surface state prepare()/emit() together.Eric Anholt2011-10-291-36/+18
* i965: Move sampler state to emit() time.Eric Anholt2011-10-292-4/+4
* i965/gen4: Move unit state setup to emit() time.Eric Anholt2011-10-296-10/+11
* i965/gen7: Fold prepare() and emit() of SF CLIP/VP state together.Eric Anholt2011-10-291-9/+4
* i965/gen4: Move CC VP to emit() time, since it's only needed by CC's emit().Eric Anholt2011-10-291-2/+2
* i965: Move push constants setup to emit() time.Eric Anholt2011-10-292-6/+6
* i965/gen6: Move setup of CC state batches to emit time.Eric Anholt2011-10-292-6/+6
* i965: Check Fallback again after upload.Eric Anholt2011-10-291-1/+6
* i965: Remove the validated BO list, now that it's unused.Eric Anholt2011-10-2912-109/+2
* i965: Use the batch save/reset code to avoid needing the BO validate step.Eric Anholt2011-10-291-33/+27
* intel: Return error value from intel_batchbuffer_flush().Eric Anholt2011-10-292-6/+12
* i965: Add a note about an unsafe-looking state check.Eric Anholt2011-10-291-0/+5
* intel: Add an interface for saving/restoring the batchbuffer state.Eric Anholt2011-10-293-0/+28
* i915: Move the always_flush_cache code to triangle emit.Eric Anholt2011-10-292-4/+8
* radeon/r200: forgot one somehowDave Airlie2011-10-291-1/+2
* radeon/r200: drop remains of non-libdrm_radeon buildDave Airlie2011-10-2914-351/+4
* i965: Use glsl_type::column_type instead of open-coding itIan Romanick2011-10-281-3/+1
* r300c/compiler: remove the compiler tooMarek Olšák2011-10-2861-17084/+0
* i965/fs: Use the actual hardware g0 register for texel offset setup.Kenneth Graunke2011-10-281-1/+1
* radeon: Remove the non-libdrm kernel memory manager support.Eric Anholt2011-10-288-464/+2
* radeon: Insist on libdrm being present to build.Eric Anholt2011-10-283-98/+3
* dri: Remove driver GenerateMipmap hooks.Eric Anholt2011-10-284-67/+0
* radeon: Drop some remaining DRI1 vblank support code.Eric Anholt2011-10-283-58/+0
* intel: remove dead prototype for old DRI1 code.Eric Anholt2011-10-281-5/+0
* radeon: Simplify cliprects computation now that there's just 1.Eric Anholt2011-10-283-69/+15
* radeon: Drop the clipping in spans, now that we always have (0,0) -> (w,h).Eric Anholt2011-10-281-54/+38
* radeon: Drop the legacy BO manager code.Eric Anholt2011-10-287-988/+0
* radeon: Drop the DRI1 zero-copy TFP code.Eric Anholt2011-10-285-92/+0
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