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path: root/src/mesa/drivers/dri
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* i965: expose sample positionsChris Forbes2013-03-023-43/+82
* i965: add support for sample mask on Gen6+Chris Forbes2013-03-024-9/+16
* i965: expose new max sample countsChris Forbes2013-03-021-2/+10
* intel: Use the new "ctx" local variable I just added some more.Eric Anholt2013-03-011-2/+2
* i965: Make sRGB-capable framebuffers by default.Eric Anholt2013-03-012-3/+63
* intel: Fix software copying of miptree faces for weird formats.Eric Anholt2013-03-013-61/+77
* intel: Add a flag for miptree mapping to disable transcoding.Eric Anholt2013-03-012-4/+17
* i965: Add WARN_ONCE for depthstencil workarounds we shouldn't be hitting.Eric Anholt2013-03-012-0/+6
* intel: Enable __DRI_API_OPENGL_CORE api with dri2 contextsJordan Justen2013-02-281-0/+2
* intel: update max versions based on MESA_GL_VERSION_OVERRIDEJordan Justen2013-02-281-0/+10
* i965/fs: Put immediate operand as src2Matt Turner2013-02-281-1/+1
* intel: Remove intel_mipmap_tree::wraps_etcChad Versace2013-02-282-21/+3
* i965/vs: Assert that ir_triop_lrp was lowered.Matt Turner2013-02-281-0/+4
* i965/fp: Use the LRP instruction for OPCODE_LRP.Matt Turner2013-02-281-8/+4
* i965/fs: Use the LRP instruction for ir_triop_lrp when possible.Kenneth Graunke2013-02-287-5/+75
* i965: Add support for emitting the LRP instruction.Kenneth Graunke2013-02-284-0/+4
* glsl: Convert mix() to use a new ir_triop_lrp opcode.Kenneth Graunke2013-02-281-1/+2
* i965/vs/gen7: Allow MATH instructions to have MRF as a destinationMatt Turner2013-02-281-1/+1
* i965/fs/gen7: Allow MATH instructions to have MRF as a destinationMatt Turner2013-02-281-1/+1
* i965/gen7: Relax restrictions on fake MRFsMatt Turner2013-02-281-2/+4
* i965/fs: Remove duplicate scan_inst->mlen checkMatt Turner2013-02-281-5/+0
* i965: Fix the W value of deprecated pointcoords on pre-gen6.Eric Anholt2013-02-251-1/+18
* i965: Enable OpenGL ES 3.0 on Sandy BridgeIan Romanick2013-02-221-1/+1
* i965/fs: Fix broken math on values loaded from uniform buffers on gen6.Eric Anholt2013-02-221-0/+1
* i965: Avoid segfault in gen6_upload_stateCarl Worth2013-02-211-1/+1
* i965: Consign COORD_REPLACE VS hacks to Pre-Gen6.Paul Berry2013-02-203-11/+34
* i965/fs: Enable CSE on uniform pull constant loads.Eric Anholt2013-02-191-0/+3
* i965/fs: Only do CSE when the dst types match.Eric Anholt2013-02-191-1/+2
* i965/fs: Delay setup of uniform loads until after pre-regalloc scheduling.Eric Anholt2013-02-193-27/+66
* i965/fs: Fix copy propagation with smearing.Eric Anholt2013-02-191-1/+2
* i965/fs: Add a bit more instruction dumping useful for upcoming work.Eric Anholt2013-02-191-1/+30
* i965: Remove unused userclip flags.Paul Berry2013-02-193-5/+0
* i965: Fix leak in blorp CopyTexSubImage2DChristopher James Halse Rogers2013-02-161-2/+2
* i965/fs: Do a general SEND dependency workaround for the original 965.Eric Anholt2013-02-153-42/+229
* i965/gen7: Set up all samplers even if samplers are sparsely used.Eric Anholt2013-02-141-1/+1
* intel: Allow blit readpixels even when the pack alignment is set.Eric Anholt2013-02-131-9/+4
* i965: Remove writemask support from brw_SAMPLE().Eric Anholt2013-02-135-109/+18
* i965/fs: Use a helper function for checking for flow control instructions.Eric Anholt2013-02-133-23/+22
* i965: Re-enable the -RHW workaround for original gen4 chips.Eric Anholt2013-02-131-12/+8
* i965/gen4: Work around missing sRGB RGB DXT1 support.Eric Anholt2013-02-133-4/+20
* i965: Use derived state for Haswell's 3DSTATE_VF packet.Kenneth Graunke2013-02-121-2/+2
* radeon: Remove dead STANDALONE_MMIO definesMatt Turner2013-02-112-3/+0
* i965: Add missing dirty bits to INTEL_DEBUG=state arrays.Kenneth Graunke2013-02-111-0/+7
* i965: Reorganize brw_bits to match the order in brw_context.h.Kenneth Graunke2013-02-111-5/+5
* i965: Use BRW_NEW_CONTEXT for gen7_disable rather than BRW_NEW_BATCH.Kenneth Graunke2013-02-111-1/+1
* i965: Remove some stale comments about the brw_constant_buffer atom.Eric Anholt2013-02-112-12/+0
* i965: Simplify VS push constant upload code since removal of old path.Eric Anholt2013-02-111-7/+11
* i965: Add perf debug for a corner case.Eric Anholt2013-02-111-0/+3
* i965: Fix access mode of index buffer rebase.Eric Anholt2013-02-111-1/+1
* i965: Fix indentation of index buffer rebase code.Eric Anholt2013-02-111-9/+9
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