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path: root/src/mesa/drivers/dri
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* intel: Return success when asked to allocate a 0-width/height renderbuffer.Eric Anholt2012-05-041-0/+3
* i965: Add support for GL_ARB_draw_buffers_blend.Eric Anholt2012-05-042-6/+10
* gbm: Add gbm_bo_write entry pointKristian Høgsberg2012-05-032-2/+31
* dri/nv10-nv20: Add support for S3TCViktor Novotný2012-05-024-0/+28
* dri/nouveau: Add general support for compressed formats.Viktor Novotný2012-05-024-33/+138
* intel: use _mesa_is_winsys/user_fbo() helpersBrian Paul2012-05-0116-32/+48
* nouveau: use _mesa_is_winsys/user_fbo() helpersBrian Paul2012-05-013-3/+7
* radeon: use _mesa_is_winsys/user_fbo() helpersBrian Paul2012-05-014-10/+14
* i965: Support Android RGBX8888 format for EGL generated imagesSean V Kelley2012-04-302-0/+12
* intel: set dri_format field for all imagesAnder Conselvan de Oliveira2012-04-301-0/+18
* intel: properly return the image format on intel_query_imageAnder Conselvan de Oliveira2012-04-301-1/+2
* autoconf: pass -Wall to automakeDylan Noblesmith2012-04-292-6/+6
* i965/fs: Fix FB writes that tried to use the non-existent m16 register.Kenneth Graunke2012-04-271-1/+4
* i965/vs: Fix texelFetchOffset()Eric Anholt2012-04-241-3/+23
* i965/fs: Fix texelFetchOffset()Eric Anholt2012-04-241-6/+21
* i965: Convert live interval computation to using live variable analysis.Eric Anholt2012-04-191-39/+26
* i965: Move the old live interval analysis code next to the new live vars code.Eric Anholt2012-04-192-122/+122
* i965: Add support for live variable analysis using dataflow analysis.Eric Anholt2012-04-193-0/+245
* i965: Add basic block generator.Eric Anholt2012-04-195-0/+392
* i965/fs: Suppress printing the whole loop in BRW_OPCODE_DO annotation.Eric Anholt2012-04-191-0/+2
* i965: Rename BRW_MAX_SURFACES to BRW_MAX_WM_SURFACES.Kenneth Graunke2012-04-182-4/+4
* i965: Fix outdated comments about binding tables.Kenneth Graunke2012-04-181-12/+8
* nouveau: rework and simplify nv04/nv05 driver a bitBen Skeggs2012-04-148-300/+215
* nouveau/vieux: switch to libdrm_nouveau-2.0Ben Skeggs2012-04-1446-1890/+1844
* i965: fix typoDylan Noblesmith2012-04-131-1/+1
* i965: When the kernel lacks the LLC check, assume it's present on gen >= 6.Eric Anholt2012-04-111-3/+7
* intel: Drop backwards compat code for not having libdrm with the LLC check.Eric Anholt2012-04-111-4/+0
* i965/fs: Avoid generating extra AND instructions on bool logic ops.Eric Anholt2012-04-111-22/+14
* i965/fs: Try to avoid generating extra MOVs to do saturates.Eric Anholt2012-04-113-12/+54
* i965: Stop lying about cpp and height of a stencil buffer.Paul Berry2012-04-105-45/+66
* i965: Add support for sampling texture buffer objects on gen7+.Eric Anholt2012-04-094-1/+71
* i965: Add real support for texturing/rendering with MESA_FORMAT_RGBA8888_REV.Eric Anholt2012-04-091-5/+1
* i965/gen7: Fix the /* ignored */ comment on constant surface setup.Eric Anholt2012-04-091-1/+1
* i965: Remove vestiges of function call support from the old VS backend.Kenneth Graunke2012-04-094-188/+0
* i915: set SPRITE_POINT_ENABLE bit correctlyYuanhan Liu2012-04-094-12/+48
* i965: Actually upload sampler state pointers for the VS unit on Gen6.Kenneth Graunke2012-04-051-1/+1
* glsl: Demote 'type' from ir_instruction to ir_rvalue and ir_variable.Kenneth Graunke2012-04-021-1/+1
* i965/aub: Dump a final bitmap from DestroyContext.Kenneth Graunke2012-04-023-29/+41
* intel: add PCI IDs for Ivy Bridge GT2 server variantEugeni Dodonov2012-04-012-1/+4
* intel: Add some PCI IDs for Haswell.Kenneth Graunke2012-03-302-2/+20
* i965: Set "Shader Channel Select" fields in Haswell's SURFACE_STATE.Kenneth Graunke2012-03-303-1/+37
* i965: Fill in Sample Mask in Haswell's 3DSTATE_PS.Kenneth Graunke2012-03-302-0/+5
* i965: Set "Stencil Buffer Enable" bit on Haswell.Kenneth Graunke2012-03-302-1/+5
* i965: Set Line Stipple enable bit in 3DSTATE_SF for Haswell.Kenneth Graunke2012-03-302-0/+5
* i965: Update max VS/PS threads shift offsets for Haswell.Kenneth Graunke2012-03-304-4/+10
* i965: Disable HiZ on Haswell for now.Kenneth Graunke2012-03-301-1/+1
* i965: Add initial IS_HASWELL() macros.Kenneth Graunke2012-03-303-5/+14
* i965: Avoid explicit accumulator operands in SIMD16 mode on Gen7.Kenneth Graunke2012-03-301-0/+3
* intel: fix un-blanced map_refcount issueYuanhan Liu2012-03-281-4/+4
* intel: fix TFP at 16-bppDave Airlie2012-03-251-6/+11
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