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Commit message (
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Author
Age
Files
Lines
*
Revert "intel: Always allocate miptrees from level 0, not tObj->BaseLevel."
Eric Anholt
2011-01-10
10
-82
/
+152
*
i965: Add #defines for HiZ and separate stencil buffer commands.
Kenneth Graunke
2011-01-10
1
-0
/
+3
*
i965: Add new HiZ related bits to WM_STATE.
Kenneth Graunke
2011-01-10
1
-1
/
+8
*
i965: Rename more #defines to 3DSTATE rather than CMD or CMD_3D.
Kenneth Graunke
2011-01-10
3
-22
/
+22
*
i965: Remove unused #defines which only contain the sub-opcode.
Kenneth Graunke
2011-01-10
1
-22
/
+0
*
r600: Include mfeatures.h in files that perform feature tests.
Vinson Lee
2011-01-09
2
-0
/
+2
*
r300: Include mfeatures.h in files that perform feature tests.
Vinson Lee
2011-01-09
2
-0
/
+2
*
r200: Include mfeatures.h in files that perform feature tests.
Vinson Lee
2011-01-09
2
-0
/
+2
*
radeon: Include mfeatures.h in files that perform feature tests.
Vinson Lee
2011-01-09
5
-0
/
+5
*
dri/nouveau: Include mfeatures.h in files that perform feature tests.
Vinson Lee
2011-01-09
2
-0
/
+3
*
intel: Include mfeatures.h in files that perform feature tests.
Vinson Lee
2011-01-09
6
-0
/
+7
*
intel: Make renderbuffer tiling choice match texture tiling choice.
Eric Anholt
2011-01-07
1
-4
/
+9
*
intel: Use the _BaseFormat from MESA_FORMAT_* in renderbuffer setup.
Eric Anholt
2011-01-07
1
-36
/
+1
*
i915: Drop old checks for the settexoffset hack.
Eric Anholt
2011-01-07
2
-17
/
+6
*
i915: Don't claim to support AL1616 when neither 830 nor 915 does it.
Eric Anholt
2011-01-07
1
-1
/
+2
*
intel: Add a vtbl hook for determining if a format is renderable.
Eric Anholt
2011-01-07
7
-38
/
+68
*
intel: expose ARB_framebuffer_object in the i915 driver.
Eric Anholt
2011-01-07
1
-1
/
+1
*
i965: Avoid double-negation of immediate values in the VS.
Eric Anholt
2011-01-07
1
-4
/
+3
*
r600c: fix up SQ setup in blit code for Ontario/NI
Alex Deucher
2011-01-07
1
-1
/
+87
*
r600c: add support for NI asics
Alex Deucher
2011-01-06
5
-1
/
+118
*
i965: Rename various gen6 #defines to match the documentation.
Kenneth Graunke
2011-01-06
12
-33
/
+33
*
mesa: fix build for NetBSD
Pierre Allegraud
2011-01-06
1
-3
/
+3
*
i965: skip too small size mipmap
Zou Nan hai
2011-01-06
1
-2
/
+4
*
i915: Fix build for previous commit.
Eric Anholt
2011-01-05
1
-11
/
+11
*
intel: Always allocate miptrees from level 0, not tObj->BaseLevel.
Eric Anholt
2011-01-05
9
-141
/
+71
*
intel: Drop unused first/lastlevel args to miptree_create_for_region.
Eric Anholt
2011-01-05
3
-8
/
+3
*
intel: Clarify first_level/last_level vs baselevel/maxlevel by deletion.
Eric Anholt
2011-01-05
7
-56
/
+30
*
i915: Enable LOD preclamping on 8xx like on 915/965.
Eric Anholt
2011-01-05
2
-0
/
+3
*
i915: Implement min/max lod clamping in hardware on 8xx.
Eric Anholt
2011-01-05
3
-25
/
+32
*
intel: Drop TEXTURE_RECTANGLE check in miptree layout setup.
Eric Anholt
2011-01-05
1
-37
/
+24
*
intel: Clean up redundant setup of firstLevel.
Eric Anholt
2011-01-05
1
-5
/
+4
*
intel: Drop a check for GL_TEXTURE_4D_SGIS.
Eric Anholt
2011-01-05
1
-1
/
+0
*
i965: Simplify the renderbuffer setup code.
Eric Anholt
2011-01-05
1
-102
/
+93
*
i965: use BLT to clear buffer if possible on Sandybridge
Xiang, Haihao
2011-01-05
1
-6
/
+0
*
i965: Add support for SRGB DXT1 formats.
Eric Anholt
2011-01-04
3
-2
/
+10
*
intel: Merge our choosetexformat fallbacks into core.
Eric Anholt
2011-01-04
5
-229
/
+60
*
r300/compiler: disable the rename_regs pass for loops
Marek Olšák
2011-01-04
1
-0
/
+8
*
r300/compiler: Fix black terrain in Civ4
Tom Stellard
2011-01-04
1
-8
/
+1
*
intel: When validating an FBO's combined depth/stencil, use the given FBO.
Eric Anholt
2011-01-04
1
-4
/
+4
*
intel: Fix segfaults from trying to use _ColorDrawBuffers in FBO validation.
Eric Anholt
2011-01-04
1
-4
/
+16
*
i965: Use last vertex convention for quad provoking vertex on sandybridge
Zhenyu Wang
2011-01-04
1
-0
/
+7
*
i965: Correct comment for gen6 fb write control message setting
Zhenyu Wang
2011-01-04
1
-1
/
+3
*
i965: Fix provoking vertex select in clip state for sandybridge
Zhenyu Wang
2011-01-04
1
-1
/
+4
*
intel: Use tri clears when we don't know how to blit clear the format.
Eric Anholt
2011-01-03
3
-7
/
+10
*
intel: Handle forced swrast clears before other clear bits.
Eric Anholt
2011-01-03
1
-22
/
+20
*
radeon: fix build on non-KMS systems.
Dave Airlie
2011-01-03
1
-0
/
+3
*
i965: Do lowering of array indexing of a vector in the FS.
Eric Anholt
2010-12-28
1
-0
/
+1
*
i965: Fix regression in FS comparisons on original gen4 due to gen6 changes.
Eric Anholt
2010-12-28
2
-4
/
+32
*
i965: Factor out the ir comparision to BRW_CONDITIONAL_* code.
Eric Anholt
2010-12-28
1
-80
/
+34
*
i965: Fix occlusion query on sandybridge
Zhenyu Wang
2010-12-28
1
-0
/
+6
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