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* i965: Fix gl_FragCoord.z setup on gen6.Eric Anholt2010-12-131-2/+7
* i956: Fix the old FP path fragment position setup on gen6.Eric Anholt2010-12-131-18/+20
* i965: Fix ARL to work on gen6.Eric Anholt2010-12-131-1/+17
* intel: Include stdbool so we can stop using GLboolean when we want to.Eric Anholt2010-12-132-14/+12
* r300/compiler: fix swizzle lowering with a presubtract source operandMarek Olšák2010-12-111-0/+1
* r300/compiler: fix LIT in VSMarek Olšák2010-12-111-1/+2
* i965: Put common info on converting MESA_FORMAT to BRW_FORMAT in a table.Eric Anholt2010-12-101-126/+42
* intel: Just use ChooseTextureFormat for renderbuffer format choice.Eric Anholt2010-12-101-52/+9
* intel: Add a couple of helper functions to reduce rb code duplication.Eric Anholt2010-12-105-138/+78
* intel: Add spans code for the ARB_texture_rg support.Eric Anholt2010-12-102-0/+154
* i965: support for two-sided lighting on SandybridgeXiang, Haihao2010-12-105-6/+72
* i965: Add support for gen6 reladdr VS constant loading.Eric Anholt2010-12-092-11/+17
* i965: Add support for gen6 constant-index constant loading.Eric Anholt2010-12-092-3/+9
* intel: Set the swizzling for depth textures using the GL_RED depth mode.Eric Anholt2010-12-092-0/+8
* intel: Use plain R8 and RG8 for COMPRESSED_RED and COMPRESSED_RG.Eric Anholt2010-12-091-0/+2
* i965: Silence uninitialized variable warning.Vinson Lee2010-12-091-0/+5
* i965: remove unused variable since brw_wm_glsl.c removal.Eric Anholt2010-12-092-2/+1
* i965: Set render_cache_read_write surface state bit on gen6 constant surfs.Eric Anholt2010-12-092-0/+9
* i965: Set up the correct texture border color state struct for Ironlake.Eric Anholt2010-12-092-5/+45
* i965: Clean up VS constant buffer location setup.Eric Anholt2010-12-091-15/+3
* i965: Fix VS constants regression pre-gen6.Eric Anholt2010-12-091-1/+1
* i965: Drop push-mode reladdr constant loading and always use constant_map.Eric Anholt2010-12-084-93/+96
* radeon: bump mip tree levels to 15Alex Deucher2010-12-091-1/+1
* i965: Drop KIL_NV from the ff/ARB_fp path since it was only used for GLSL.Eric Anholt2010-12-083-21/+0
* i965: Use the new pixel mask location for gen6 ARB_fp KIL instructions.Eric Anholt2010-12-081-2/+8
* i965: Set the render target index in gen6 fixed-function/ARB_fp path.Eric Anholt2010-12-081-0/+7
* i965: Set up the per-render-target blend state on gen6.Eric Anholt2010-12-081-46/+49
* i965: Set up the color masking for the first drawbuffer on gen6.Eric Anholt2010-12-081-0/+9
* r300/compiler: remove at least unused immediates if externals cannot be removedMarek Olšák2010-12-083-8/+6
* r300/compiler: make lowering passes possibly use up to two less tempsMarek Olšák2010-12-081-63/+86
* r300/compiler: handle DPH and XPD in rc_compute_sources_for_writemaskMarek Olšák2010-12-081-0/+5
* r300/compiler: do not print pair/tex/presub program stats for vertex shadersMarek Olšák2010-12-081-16/+30
* r300/compiler: cleanup rc_run_compilerMarek Olšák2010-12-084-15/+36
* r300/compiler: add a function to query program stats (alu, tex, temps..)Marek Olšák2010-12-082-15/+39
* r300/compiler: don't terminate regalloc if we surpass max temps limitMarek Olšák2010-12-081-11/+6
* i965: Don't try to store gen6 (float) blend constant color in bytes.Eric Anholt2010-12-071-1/+1
* i965: Fix flipped value of the not-embedded-in-if on gen6.Eric Anholt2010-12-071-1/+1
* i965: Work around gen6 ignoring source modifiers on math instructions.Eric Anholt2010-12-073-3/+26
* i965: Add disabled debug code for dumping out the WM constant payload.Eric Anholt2010-12-071-0/+15
* i965: Correctly emit constants for aggregate types (array, matrix, struct)Ian Romanick2010-12-071-19/+61
* i965: Always hand the absolute value to RSQ.Eric Anholt2010-12-072-1/+6
* i965: Handle saturates on gen6 math instructions.Eric Anholt2010-12-071-0/+2
* i965: Fix comment about gen6_wm_constants.Eric Anholt2010-12-071-1/+1
* i965: upload WM state for _NEW_POLYGON on sandybridgeZhenyu Wang2010-12-071-1/+1
* r200: Silence uninitialized variable warning.Vinson Lee2010-12-071-0/+1
* i965: set minimum/maximum Point Width on SandybridgeXiang, Haihao2010-12-071-1/+3
* i965: Remove INTEL_DEBUG=glsl_force now that there's no brw_wm_glsl.cEric Anholt2010-12-062-7/+0
* i965: Nuke brw_wm_glsl.c.Eric Anholt2010-12-068-1057/+10
* i965: Add support for the instruction compression bits on gen6.Eric Anholt2010-12-064-47/+91
* i965: Align gen6 push constant size to dispatch width.Eric Anholt2010-12-061-1/+2
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